Issued Patents All Time
Showing 51–70 of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9917196 | Semiconductor device and method of forming the semiconductor device | Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Eric R. Miller, Robert R. Robison +1 more | 2018-03-13 |
| 9905643 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Kangguo Cheng, Eric R. Miller, John R. Sporre | 2018-02-27 |
| 9893166 | Dummy gate formation using spacer pull down hardmask | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, John R. Sporre | 2018-02-13 |
| 9842739 | Method and structure for enabling high aspect ratio sacrificial gates | Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre | 2017-12-12 |
| 9786666 | Method to form dual channel semiconductor material fins | Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Eric R. Miller, John R. Sporre | 2017-10-10 |
| 9768075 | Method and structure to enable dual channel fin critical dimension control | Marc A. Bergendahl, Kangguo Cheng, John R. Sporre | 2017-09-19 |
| 9754942 | Single spacer for complementary metal oxide semiconductor process flow | Marc A. Bergendahl, Kangguo Cheng, Jessica Dechene, Fee Li Lie, Eric R. Miller +2 more | 2017-09-05 |
| 9748146 | Single spacer for complementary metal oxide semiconductor process flow | Marc A. Bergendahl, Kangguo Cheng, Jessica Dechene, Fee Li Lie, Eric R. Miller +2 more | 2017-08-29 |
| 9728622 | Dummy gate formation using spacer pull down hardmask | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, John R. Sporre | 2017-08-08 |
| 9716184 | Enabling large feature alignment marks with sidewall image transfer patterning | Kangguo Cheng, Sivananda K. Kanakasabapathy, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2017-07-25 |
| 9659779 | Method and structure for enabling high aspect ratio sacrificial gates | Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre | 2017-05-23 |
| 9627277 | Method and structure for enabling controlled spacer RIE | Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2017-04-18 |
| 9620590 | Nanosheet channel-to-source and drain isolation | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, John R. Sporre | 2017-04-11 |
| 9608065 | Air gap spacer for metal gates | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, John R. Sporre | 2017-03-28 |
| 9553044 | Electrically conductive interconnect including via having increased contact surface area | Hsueh-Chung Chen, James J. Demarest, Chih-Chao Yang | 2017-01-24 |
| 9536744 | Enabling large feature alignment marks with sidewall image transfer patterning | Kangguo Cheng, Sivananda K. Kanakasabapathy, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2017-01-03 |
| 9450095 | Single spacer for complementary metal oxide semiconductor process flow | Marc A. Bergendahl, Kangguo Cheng, Jessica Dechene, Fee Li Lie, Eric R. Miller +2 more | 2016-09-20 |
| 9362179 | Method to form dual channel semiconductor material fins | Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Eric R. Miller, John R. Sporre | 2016-06-07 |
| 9331073 | Epitaxially grown quantum well finFETs for enhanced pFET performance | Marc A. Bergendahl, James J. Demarest, Hong He, Seth L. Knupp, Raghavasimhan Sreenivasan +2 more | 2016-05-03 |
| 9318574 | Method and structure for enabling high aspect ratio sacrificial gates | Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre | 2016-04-19 |