Issued Patents All Time
Showing 251–275 of 836 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10248423 | Executing short pointer mode applications | — | 2019-04-02 |
| 10241769 | Marking sibling caller routines | — | 2019-03-26 |
| 10235297 | Mechanism for creating friendly transactions with credentials | Jonathan D. Bradbury, Fadi Y. Busaba, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2019-03-19 |
| 10235271 | Debugging of prefixed code | — | 2019-03-19 |
| 10235201 | Dynamic releasing of cache lines | Jonathan D. Bradbury, Chung-Lung K. Shum, Timothy J. Slegel | 2019-03-19 |
| 10235190 | Executing instructions to store context information based on routine to be executed | — | 2019-03-19 |
| 10235172 | Branch predictor performing distinct non-transaction branch prediction functions and transaction branch prediction functions | Valentina Salapura | 2019-03-19 |
| 10235169 | Implementing a received add program counter immediate shift (ADDPCIS) instruction using a micro-coded or cracked sequence | — | 2019-03-19 |
| 10235144 | Reconfiguration of address space based on loading short pointer mode application | — | 2019-03-19 |
| 10229266 | Architected store and verify guard word instructions | — | 2019-03-12 |
| 10229045 | Conditional stack frame allocation | Ronald I. McIntosh, Ulrich Weigand | 2019-03-12 |
| 10229044 | Conditional stack frame allocation | Ronald I. McIntosh, Ulrich Weigand | 2019-03-12 |
| 10228992 | Providing instructions to facilitate detection of corrupt stacks | Ronald I. McIntosh | 2019-03-12 |
| 10228946 | Reading a register pair by writing a wide register | Jonathan D. Bradbury | 2019-03-12 |
| 10228943 | Prefetching of discontiguous storage locations in anticipation of transactional execution | Fadi Y. Busaba, Dan F. Greiner, Maged M. Michael, Valentina Salapura, Eric M. Schwarz +1 more | 2019-03-12 |
| 10223268 | Transactional memory system including cache versioning architecture to implement nested transactions | Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2019-03-05 |
| 10223257 | Multi-section garbage collection | Giles R. Frazier, Younes Manton, Karl M. Taylor, Brian W. Thompto | 2019-03-05 |
| 10223154 | Hint instruction for managing transactional aborts in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Maged M. Michael, Valentina Salapura +2 more | 2019-03-05 |
| 10223087 | Comparisons in function pointer localization | Ulrich Weigand | 2019-03-05 |
| 10216642 | Hardware-based pre-page walk virtual address transformation where the virtual address is shifted by current page size and a minimum page size | Anthony J. Bybell, Bradly G. Frey | 2019-02-26 |
| 10216635 | Instruction to cancel outstanding cache prefetches | Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2019-02-26 |
| 10210163 | Linker rewriting to eliminate TOC pointer references | Ulrich Weigand | 2019-02-19 |
| 10210019 | Hint instruction for managing transactional aborts in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Dan F. Greiner, Maged M. Michael, Valentina Salapura +2 more | 2019-02-19 |
| 10209972 | Executing optimized local entry points | Ulrich Weigand | 2019-02-19 |
| 10185677 | Non-interfering transactions | Valentina Salapura | 2019-01-22 |