MG

Michael K. Gschwind

IBM: 824 patents #6 of 70,183Top 1%
Globalfoundries: 11 patents #330 of 4,424Top 8%
IS International Business Systems: 1 patents #1 of 22Top 5%
📍 Chappaqua, NY: #1 of 336 inventorsTop 1%
🗺 New York: #5 of 115,490 inventorsTop 1%
Overall (All Time): #98 of 4,157,543Top 1%
836
Patents All Time

Issued Patents All Time

Showing 201–225 of 836 patents

Patent #TitleCo-InventorsDate
10379862 Effectiveness and prioritization of prefeteches Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum 2019-08-13
10379851 Fine-grained management of exception enablement of floating point controls Valentina Salapura 2019-08-13
10372457 Effectiveness and prioritization of prefetches Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum 2019-08-06
10372611 Deferred response to a prefetch request Valentina Salapura, Chung-Lung K. Shum 2019-08-06
10372447 Selecting processing based on expected value of selected character 2019-08-06
10372448 Selecting processing based on expected value of selected character 2019-08-06
10365990 Debugging of prefixed code 2019-07-30
10365927 Non-default instruction handling within transaction Jonathan D. Bradbury, Maged M. Michael, Eric M. Schwarz, Valentina Salapura, Chung-Lung K. Shum 2019-07-30
10360153 System operation queue for transaction Jonathan D. Bradbury, Eric M. Schwarz 2019-07-23
10360005 Local function call tailoring for function pointer calls Ulrich Weigand 2019-07-23
10360007 Linking optimized entry points for local-use-only function pointers Ulrich Weigand 2019-07-23
10353734 Prioritization of transactions based on execution by transactional core with super core indicator Fadi Y. Busaba, Harold W. Cain, III, Valentina Salapura, Eric M. Schwarz, Timothy J. Slegel 2019-07-16
10346146 Loading optimized local entry points for local-use-only function pointers Ulrich Weigand 2019-07-09
10346169 Selective suppression of instruction cache-related directory access Valentina Salapura 2019-07-09
10346180 Simultaneously capturing status information for multiple operating modes Brett Olsson 2019-07-09
10346305 Interprocessor memory status communication Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel 2019-07-09
10339049 Garbage collection facility grouping infrequently accessed data units in designated transient memory area Giles R. Frazier, Christian Jacobi, Younes Manton, Anthony Saporito, Chung-Lung K. Shum 2019-07-02
10331565 Transactional memory system including cache versioning architecture to implement nested transactions Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum 2019-06-25
10324717 Selecting processing based on expected value of selected character 2019-06-18
10324728 Lightweight interrupts for condition checking Giles R. Frazier, Christian Jacobi, Chung-Lung K. Shum, Joran S. C. Siu, Timothy J. Slegel +1 more 2019-06-18
10324687 Single operation array index computation 2019-06-18
10324716 Selecting processing based on expected value of selected character 2019-06-18
10324715 Compiler controls for program regions Valentina Salapura 2019-06-18
10318790 Code fingerprint-based processor malfunction detection Giles R. Frazier, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum 2019-06-11
10318430 System operation queue for transaction Jonathan D. Bradbury, Eric M. Schwarz 2019-06-11