Issued Patents All Time
Showing 226–250 of 836 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10318415 | Garbage collection facility grouping infrequently accessed data units in designated transient memory area | Giles R. Frazier, Christian Jacobi, Younes Manton, Anthony Saporito, Chung-Lung K. Shum | 2019-06-11 |
| 10318299 | Reading a register pair by writing a wide register | Jonathan D. Bradbury | 2019-06-11 |
| 10318240 | Read and set floating point control register instruction | Valentina Salapura | 2019-06-11 |
| 10318289 | Non-faulting compute instructions | Brett Olsson | 2019-06-11 |
| 10310952 | Using transactional execution for reliability and recovery of transient failures | Valentina Salapura | 2019-06-04 |
| 10310855 | Non-default instruction handling within transaction | Jonathan D. Bradbury, Maged M. Michael, Eric M. Schwarz, Valentina Salapura, Chung-Lung K. Shum | 2019-06-04 |
| 10310854 | Non-faulting compute instructions | Brett Olsson | 2019-06-04 |
| 10310829 | Compiling optimized entry points for local-use-only function pointers | Ulrich Weigand | 2019-06-04 |
| 10310814 | Read and set floating point control register instruction | Valentina Salapura | 2019-06-04 |
| 10293534 | Hybrid tracking of transaction read and write sets | Valentina Salapura, Chung-Lung K. Shum | 2019-05-21 |
| 10289499 | Using transactional execution for reliability and recovery of transient failures | Valentina Salapura | 2019-05-14 |
| 10289420 | Lightweight interrupts for floating point exceptions using enable bit in branch event status and control register (BESCR) | Giles R. Frazier | 2019-05-14 |
| 10289414 | Suppressing branch prediction on a repeated execution of an aborted transaction | Valentina Salapura, Chung-Lung K. Shum | 2019-05-14 |
| 10282276 | Fingerprint-initiated trace extraction | Jonathan D. Bradbury, Giles R. Frazier, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum | 2019-05-07 |
| 10270775 | Mechanism for creating friendly transactions with credentials | Jonathan D. Bradbury, Fadi Y. Busaba, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2019-04-23 |
| 10270773 | Mechanism for creating friendly transactions with credentials | Jonathan D. Bradbury, Fadi Y. Busaba, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2019-04-23 |
| 10268465 | Executing local function call site optimization | Ulrich Weigand | 2019-04-23 |
| 10261828 | Interprocessor memory status communication | Timothy J. Slegel | 2019-04-16 |
| 10261827 | Interprocessor memory status communication | Timothy J. Slegel | 2019-04-16 |
| 10261826 | Suppressing branch prediction updates upon repeated execution of an aborted transaction until forward progress is made | Valentina Salapura, Chung-Lung K. Shum | 2019-04-16 |
| 10255189 | Mechanism for creating friendly transactions with credentials | Jonathan D. Bradbury, Fadi Y. Busaba, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2019-04-09 |
| 10255100 | Performance optimization engine for processor parameter adjustment | Giles R. Frazier | 2019-04-09 |
| 10255068 | Dynamically selecting a memory boundary to be used in performing operations | — | 2019-04-09 |
| 10248573 | Managing memory used to back address translation structures | Jonathan D. Bradbury | 2019-04-02 |
| 10248482 | Interlinking modules with differing protections using stack indicators | — | 2019-04-02 |