Issued Patents All Time
Showing 201–225 of 316 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847259 | Germanium dual-fin field effect transistor | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-12-19 |
| 9837509 | Semiconductor device including strained finFET | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-12-05 |
| 9837415 | FinFET structures having silicon germanium and silicon fins with suppressed dopant diffusion | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-12-05 |
| 9837414 | Stacked complementary FETs featuring vertically stacked horizontal nanowires | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-12-05 |
| 9837406 | III-V FINFET devices having multiple threshold voltages | Pouya Hashemi, Alexander Reznicek | 2017-12-05 |
| 9829535 | Test structure to measure delay variability mismatch of digital logic paths | Bruce M. Fleischer, Keith A. Jenkins, Christos Vezyrtzis | 2017-11-28 |
| 9818647 | Germanium dual-fin field effect transistor | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-11-14 |
| 9812530 | High germanium content silicon germanium fins | John Bruley, Pouya Hashemi, Ali Khakifirooz, John A. Ott, Alexander Reznicek | 2017-11-07 |
| 9806173 | Channel-last replacement metal-gate vertical field effect transistor | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-31 |
| 9799777 | Floating gate memory in a channel last vertical FET flow | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2017-10-24 |
| 9799568 | Field effect transistor including strained germanium fins | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-24 |
| 9793401 | Vertical field effect transistor including extension and stressors | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-17 |
| 9793263 | Digital alloy FinFET co-integrated with passive resistor with good temperature coefficient | Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari, Alexander Reznicek | 2017-10-17 |
| 9786782 | Source/drain FinFET channel stressor structure | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-10 |
| 9786768 | III-V vertical field effect transistors with tunable bandgap source/drain regions | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-10 |
| 9786758 | Vertical Schottky barrier FET | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-10 |
| 9786739 | Stacked nanosheets by aspect ratio trapping | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-10 |
| 9780100 | Vertical floating gate memory with variable channel doping profile | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2017-10-03 |
| 9779995 | Highly scaled tunnel FET with tight pitch and method to fabricate same | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-03 |
| 9780088 | Co-fabrication of vertical diodes and fin field effect transistors on the same substrate | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-03 |
| 9780194 | Vertical transistor structure with reduced parasitic gate capacitance | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-03 |
| 9773913 | Vertical field effect transistor with wrap around metallic bottom contact to improve contact resistance | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-09-26 |
| 9773780 | Devices including gates with multiple lengths | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-09-26 |
| 9761608 | Lateral bipolar junction transistor with multiple base lengths | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2017-09-12 |
| 9761726 | Vertical field effect transistor with undercut buried insulating layer to improve contact resistance | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-09-12 |