Issued Patents All Time
Showing 151–175 of 316 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10090307 | Decoupling capacitor on strain relaxation buffer layer | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-10-02 |
| 10090290 | Stacked electrostatic discharge diode structures | Alexander Reznicek, Bahman Hekmatshoartabari, Tak H. Ning | 2018-10-02 |
| 10084064 | Fabrication of strained vertical p-type field effect transistors by bottom condensation | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-09-25 |
| 10083882 | Nanowire semiconductor device | Pouya Hashemi, Sanghoon Lee | 2018-09-25 |
| 10083875 | Vertical transistors having different gate lengths | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2018-09-25 |
| 10079288 | Contact formation on germanium-containing substrates using hydrogenated silicon | Pouya Hashemi, Bahman Hekmatshoartabari, Alexander Reznicek | 2018-09-18 |
| 10079228 | Tight integrated vertical transistor dual diode structure for electrostatic discharge circuit protector | Bahman Hekmatshoartabari, Alexander Reznicek, Jeng-Bang Yau | 2018-09-18 |
| 10074720 | Digital alloy vertical lamellae finfet with current flow in alloy layer direction | Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari, Alexander Reznicek | 2018-09-11 |
| 10069008 | Vertical transistor pass gate device | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-09-04 |
| 10070316 | Permission delegation framework | Sanjay Patil, Dushyant Vipradas | 2018-09-04 |
| 10056379 | Low voltage (power) junction FET with all-around junction gate | Bahman Hekmatshoartabari, Alexander Reznicek, Jeng-Bang Yau | 2018-08-21 |
| 10056254 | Methods for removal of selected nanowires in stacked gate all around architecture | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-08-21 |
| 10056482 | Implementation of long-channel thick-oxide devices in vertical transistor flow | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-08-21 |
| 10043878 | Vertical field-effect-transistors having multiple threshold voltages | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-08-07 |
| 10043825 | Lateral bipolar junction transistor with multiple base lengths | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2018-08-07 |
| 10038053 | Methods for removal of selected nanowires in stacked gate all around architecture | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-07-31 |
| 10008596 | Channel-last replacement metal-gate vertical field effect transistor | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-06-26 |
| 10002794 | Multiple gate length vertical field-effect-transistors | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-06-19 |
| 10002924 | Devices including high percentage SiGe fins formed at a tight pitch and methods of manufacturing same | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-06-19 |
| 9997472 | Support for long channel length nanowire transistors | Isaac Lauer, Tenko Yamashita, Jeffrey W. Sleight | 2018-06-12 |
| 9997619 | Bipolar junction transistors and methods forming same | Bahman Hekmatshoartabari, Alexander Reznicek, Jeng-Bang Yau | 2018-06-12 |
| 9991168 | Germanium dual-fin field effect transistor | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-06-05 |
| 9991359 | Vertical transistor gated diode | Alexander Reznicek | 2018-06-05 |
| 9984871 | Superlattice lateral bipolar junction transistor | Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari, Alexander Reznicek | 2018-05-29 |
| 9972684 | Compressive strain semiconductor substrates | Pouya Hashemi, Nicolas Loubet, Alexander Reznicek | 2018-05-15 |