Issued Patents All Time
Showing 76–93 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10031780 | Component services integration with dynamic constraint provisioning | Mehul H. Darji, Clyde T. Foster, II, Jhansi R. Kolla | 2018-07-24 |
| 10025631 | Component services integration with dynamic constraint provisioning | Mehul H. Darji, Clyde T. Foster, II, Jhansi R. Kolla | 2018-07-17 |
| 9990414 | Cognitive architecture with content provider managed corpus | Christopher M. Madison, Sridhar Sudarsan | 2018-06-05 |
| 9940395 | Influence business benefit from user reviews and cognitive dissonance | Corville O. Allen | 2018-04-10 |
| 9779327 | Cognitive traits avatar for similarity matching | Corville O. Allen, Alissa J. Hartenbaum, Trenton J. Johnson, Laura J. Rodriguez | 2017-10-03 |
| 9760766 | System and method for interpreting interpersonal communication | Dario Gil, David O. Melville, Valentina Salapura | 2017-09-12 |
| 9747375 | Influence personal benefit from dynamic user modeling matching with natural language statements in reviews | Corville O. Allen | 2017-08-29 |
| 9747510 | Techniques for rotating language preferred orientation on a mobile device | Adrian B. Jordan, Michael T. Peters, David S. Richardson, Teppei Tsurumi | 2017-08-29 |
| 9727797 | Techniques for rotating language preferred orientation on a mobile device | Adrian B. Jordan, Michael T. Peters, David S. Richardson, Teppei Tsurumi | 2017-08-08 |
| 9690774 | Identifying vague questions in a question-answer system | William A. Beason, Vincent J. Dowling, Anne Elizabeth Gattiker, Lakshminarayanan Krishnamurthy | 2017-06-27 |
| 8863066 | Wiring-optimal method to route high performance clock nets satisfying electrical and reliability constraints | Phillip J. Restle, David Wen-Hao Shan | 2014-10-14 |
| 8799846 | Facilitating the design of a clock grid in an integrated circuit | Christopher J. Berry, Daniel R. Menard, Susan R. Sanicky, Amanda Christine Venton, Paul G. Villarrubia +1 more | 2014-08-05 |
| 8775996 | Direct current circuit analysis based clock network design | Charles J. Alpert, Zhuo Li, Joseph J. Palumbo, Haifeng Qian, Phillip J. Restle +2 more | 2014-07-08 |
| 8677305 | Designing a robust power efficient clock distribution network | Charles J. Alpert, Zhuo Li, Joseph J. Palumbo, Haifeng Qian, Phillip J. Restle +2 more | 2014-03-18 |
| 7266797 | Automated and electrically robust method for placing power gating switches in voltage islands | Lu′Ay Bakir | 2007-09-04 |
| 7200829 | I/O circuit power routing system and method | Patrick M. Ryan | 2007-04-03 |
| 7065728 | Method for placing electrostatic discharge clamps within integrated circuit devices | Lu'ay Bakir, Ciaran J. Brennan, Robert A. Proctor | 2006-06-20 |
| 6631502 | Method of analyzing integrated circuit power distribution in chips containing voltage islands | Patrick H. Buffet, Paul D. Montane, Robert A. Proctor, Erich C. Schanzenbach, Ivan L. Wemple | 2003-10-07 |