ES

Erich C. Schanzenbach

IBM: 9 patents #11,918 of 70,183Top 20%
SA Sfs Group International Ag: 1 patents #5 of 26Top 20%
Overall (All Time): #490,990 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12038034 Self-drilling, anti-burr, threaded fastener Sven SPIRIG, Kevin Reinheimer 2024-07-16
10467372 Implementing automated identification of optimal sense point and sector locations in various on-chip linear voltage regulator designs Anurag P. Umbarkar, Howard H. Smith, Raju Balasubramanian 2019-11-05
9607118 Evaluating on-chip voltage regulation Raju Balasubramanian, Howard H. Smith, Anurag P. Umbarkar 2017-03-28
9582622 Evaluating on-chip voltage regulation Raju Balasubramanian, Howard H. Smith, Anurag P. Umbarkar 2017-02-28
7496877 Electrostatic discharge failure avoidance through interaction between floorplanning and power routing Andrew D. Huber, Ciaran J. Brennan, Paul E. Dunn, Scott Whitney Gould, Lin Lin 2009-02-24
7234124 Method and apparatus for performing power routing on a voltage island within an integrated circuit chip Bing Chen, Scott Whitney Gould, Mark Hsu, Patrick M. Ryan 2007-06-19
6861753 Method and apparatus for performing power routing on a voltage island within an integrated circuit chip Bing Chen, Scott Whitney Gould, Mark Hsu, Patrick M. Ryan 2005-03-01
6725439 Method of automated design and checking for ESD robustness Philip S. Homsinger, Andrew D. Huber, Debra K. Korejwa, William J. Livingstone, Jeannie H. Panner +3 more 2004-04-20
6631502 Method of analyzing integrated circuit power distribution in chips containing voltage islands Patrick H. Buffet, Joseph N. Kozhaya, Paul D. Montane, Robert A. Proctor, Ivan L. Wemple 2003-10-07
5631842 Parallel approach to chip wiring Rafik R. Habra 1997-05-20