Issued Patents All Time
Showing 76–100 of 289 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9209095 | III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method | Josephine B. Chang, Gen P. Lauer, Isaac Lauer | 2015-12-08 |
| 9209086 | Low temperature salicide for replacement gate nanowires | Josephine B. Chang, Michael A. Guillorn, Gen P. Lauer, Isaac Lauer | 2015-12-08 |
| 9190419 | Diode structure and method for FINFET technologies | Josephine B. Chang, Isaac Lauer, Chung-Hsun Lin | 2015-11-17 |
| 9184301 | Planar and nanowire field effect transistors | Sarunya Bangsaruntip, Guy M. Cohen, Shreesh Narasimha | 2015-11-10 |
| 9105650 | Lateral bipolar transistor and CMOS hybrid technology | Josephine B. Chang, Gen P. Lauer, Isaac Lauer | 2015-08-11 |
| 9093379 | Silicidation blocking process using optically sensitive HSQ resist and organic planarizing layer | Michael A. Guillorn, Isaac Lauer | 2015-07-28 |
| 9087916 | Method for keyhole repair in replacement metal gate integration through the use of a printable dielectric | Josephine B. Chang, Michael A. Guillorn | 2015-07-21 |
| 9064942 | Nanowire capacitor for bidirectional operation | Sarunya Bangsaruntip, Amlan Majumdar | 2015-06-23 |
| 9059289 | Stringer-free gate electrode for a suspended semiconductor fin | Josephine B. Chang, Isaac Lauer, Chung-Hsun Lin | 2015-06-16 |
| 9053981 | Hybrid CMOS nanowire mesh device and PDSOI device | Josephine B. Chang, Leland Chang, Chung-Hsun Lin | 2015-06-09 |
| 9035383 | Nanowire capacitor for bidirectional operation | Sarunya Bangsaruntip, Amlan Majumdar | 2015-05-19 |
| 9024355 | Embedded planar source/drain stressors for a finFET including a plurality of fins | Josephine B. Chang, Paul Chang, Michael A. Guillorn | 2015-05-05 |
| 9018084 | Tapered fin field effect transistor | Josephine B. Chang, Michael A. Guillorn, Chung-Hsun Lin, Ryan M. Martin | 2015-04-28 |
| 9006810 | DRAM with a nanowire access transistor | Josephine B. Chang | 2015-04-14 |
| 9006087 | Diode structure and method for wire-last nanomesh technologies | Josephine B. Chang, Isaac Lauer, Chung-Hsun Lin | 2015-04-14 |
| 8994108 | Diode structure and method for wire-last nanomesh technologies | Josephine B. Chang, Isaac Lauer, Chung-Hsun Lin | 2015-03-31 |
| 8981478 | Recessed source and drain regions for FinFETs | Josephine B. Chang, Paul Chang, Michael A. Guillorn, Chung-Hsun Lin | 2015-03-17 |
| 8969964 | Embedded silicon germanium N-type field effect transistor for reduced floating body effect | Leland Chang, Isaac Lauer, Chung-Hsun Lin | 2015-03-03 |
| 8969145 | Wire-last integration method and structure for III-V nanowire devices | Josephine B. Chang, Isaac Lauer, Amlan Majumdar | 2015-03-03 |
| 8946782 | Method for keyhole repair in replacement metal gate integration through the use of a printable dielectric | Josephine B. Chang, Michael A. Guillorn | 2015-02-03 |
| 8946680 | TFET with nanowire source | Sarunya Bangsaruntip, Isaac Lauer, Amlan Majumdar | 2015-02-03 |
| 8940591 | Embedded silicon germanium N-type filed effect transistor for reduced floating body effect | Leland Chang, Isaac Lauer, Chung-Hsun Lin | 2015-01-27 |
| 8936972 | Epitaxially thickened doped or undoped core nanowire FET structure and method for increasing effective device width | Sarunya Bangsaruntip, Guy M. Cohen, Chung-Hsun Lin | 2015-01-20 |
| 8929133 | Complementary SOI lateral bipolar for SRAM in a CMOS platform | Jin Cai, Leland Chang | 2015-01-06 |
| 8928083 | Diode structure and method for FINFET technologies | Josephine B. Chang, Isaac Lauer, Chung-Hsun Lin | 2015-01-06 |