Issued Patents All Time
Showing 51–75 of 112 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7087486 | Method for scalable, low-cost polysilicon capacitor in a planar DRAM | Randy W. Mann | 2006-08-08 |
| 7087499 | Integrated antifuse structure for FINFET and CMOS devices | Jed H. Rankin, Wagdi W. Abadeer, William R. Tonti | 2006-08-08 |
| 7005334 | Zero threshold voltage pFET and method of making same | Chung H. Lam, Randy W. Mann, Jeffery H. Oppold | 2006-02-28 |
| 6997688 | Secondary containment for a magnetic-drive centrifugal pump | Manfred Klein, Brian C. Ward, Scott A. McAloon, Peter E. Phelps | 2006-02-14 |
| 6980481 | Address transition detect control circuit for self timed asynchronous memories | — | 2005-12-27 |
| 6963515 | Method and device for a scalable memory building block | Craig R. Chafin, Chang Ho Jung | 2005-11-08 |
| 6908291 | Corrosion-resistant impeller for a magnetic-drive centrifugal pump | Manfred Klein, Scott A. McAloon | 2005-06-21 |
| 6888187 | DRAM cell with enhanced SER immunity | David M. Fried, Edward J. Nowak, Beth Ann Rainey | 2005-05-03 |
| 6881672 | Selective silicide blocking | Matthew J. Breitwisch, Terence B. Hook, Randy W. Mann, Christopher S. Putnam, Mohammad I. Younus | 2005-04-19 |
| 6876035 | High voltage N-LDMOS transistors having shallow trench isolation region | Wagdi W. Abadeer, Robert J. Gauthier, Jr., Jed H. Rankin, William R. Tonti | 2005-04-05 |
| 6864136 | DRAM cell with enhanced SER immunity | David M. Fried, Edward J. Nowak, Beth Ann Rainey | 2005-03-08 |
| 6825530 | Zero Threshold Voltage pFET and method of making same | Chung H. Lam, Randy W. Mann, Jeffery H. Oppold | 2004-11-30 |
| 6815751 | Structure for scalable, low-cost polysilicon DRAM in a planar capacitor | Randy W. Mann | 2004-11-09 |
| 6797592 | Method for forming a retrograde implant | Bryant C. Colwill, Terence B. Hook, Dennis Hoyniak | 2004-09-28 |
| 6792578 | Hard macro having an antenna rule violation free input/output ports | Craig R. Chafin | 2004-09-14 |
| 6778449 | Method and design for measuring SRAM array leakage macro (ALM) | Matthew J. Breitwisch, Randy W. Mann, Jeffrey H. Oppold | 2004-08-17 |
| 6774017 | Method and structures for dual depth oxygen layers in silicon-on-insulator processes | Andres Bryant, Robert J. Gauthier, Jr., Randy W. Mann, Steven H. Voldman | 2004-08-10 |
| 6770907 | Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure | Wagdi W. Abadeer, Eric Adler, Robert J. Gauthier, Jr., Jonathan M. McKenna, Jed H. Rankin +2 more | 2004-08-03 |
| 6730552 | MOSFET with decoupled halo before extension | Wagdi W. Abadeer, Kiran V. Chatty, Robert J. Gauthier, Jr., Carl Radens, William R. Tonti | 2004-05-04 |
| 6700163 | Selective silicide blocking | Matthew J. Breitwisch, Terence B. Hook, Randy W. Mann, Christopher S. Putnam, Mohammad I. Younus | 2004-03-02 |
| 6624031 | Test structure and methodology for semiconductor stress-induced defects and antifuse based on same test structure | Wagdi W. Abadeer, Eric Adler, Robert J. Gauthier, Jr., Jonathan M. McKenna, Jed H. Rankin +2 more | 2003-09-23 |
| 6614124 | Simple 4T static ram cell for low power CMOS applications | Chung H. Lam, Randy W. Mann | 2003-09-02 |
| 6610585 | Method for forming a retrograde implant | Bryant C. Colwill, Terence B. Hook, Dennis Hoyniak | 2003-08-26 |
| 6529436 | Supply degradation compensation for memory self time circuits | — | 2003-03-04 |
| 6501695 | Technique for the reduction of memory access time variation | — | 2002-12-31 |