Issued Patents All Time
Showing 51–75 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9997704 | Scaled cross bar array with undercut electrode | Takashi Ando, Marwan H. Khater, Seyoung Kim | 2018-06-12 |
| 9941121 | Selective dry etch for directed self assembly of block copolymers | Sebastian U. Engelmann, Ashish Jagtiani, HsinYu Tsai | 2018-04-10 |
| 9911648 | Interconnects based on subtractive etching of silver | Brett C. Baker-O'Neal, Eric A. Joseph | 2018-03-06 |
| 9887351 | Multivalent oxide cap for analog switching resistive memory | Takashi Ando, Marwan H. Khater, Seyoung Kim | 2018-02-06 |
| 9799519 | Selective sputtering with light mass ions to sharpen sidewall of subtractively patterned conductive metal layer | Eric A. Joseph | 2017-10-24 |
| 9786597 | Self-aligned pitch split for unidirectional metal wiring | Josephine B. Chang, Michael A. Guillorn, Eric A. Joseph | 2017-10-10 |
| 9773698 | Method of manufacturing an ultra low dielectric layer | Robert L. Bruce, Geraud Jean-Michel Dubois, Gregory M. Fritz, Teddie Peregrino Magbitang, Willi Volksen | 2017-09-26 |
| 9773978 | Optimal device structures for back-end-of-line compatible mixed ionic electronic conductors materials | Gloria Wing Yun Fraczak, Kumar R. Virwani | 2017-09-26 |
| 9728421 | High aspect ratio patterning of hard mask materials by organic soft masks | Markus Brink, Sebastian U. Engelmann, Eric A. Joseph | 2017-08-08 |
| 9728717 | Magnetic tunnel junction patterning using low atomic weight ion sputtering | Anthony J. Annunziata, Rohit Kilaru, Nathan P. Marchack | 2017-08-08 |
| 9711613 | Stacked graphene field-effect transistor | Aaron D. Franklin, Satoshi Oida, Joshua T. Smith | 2017-07-18 |
| 9653395 | Hybrid subtractive etch/metal fill process for fabricating interconnects | Robert L. Bruce, Gregory M. Fritz, Eric A. Joseph | 2017-05-16 |
| 9646881 | Hybrid subtractive etch/metal fill process for fabricating interconnects | Robert L. Bruce, Gregory M. Fritz, Eric A. Joseph | 2017-05-09 |
| 9633948 | Low energy etch process for nitrogen-containing dielectric layer | Markus Brink, Robert L. Bruce, Sebastian U. Engelmann, Nicholas C. M. Fuller, Masahiro Nakamura | 2017-04-25 |
| 9601546 | Scaled cross bar array with undercut electrode | Takashi Ando, Marwan H. Khater, Seyoung Kim | 2017-03-21 |
| 9564362 | Interconnects based on subtractive etching of silver | Brett C. Baker-O'Neal, Eric A. Joseph | 2017-02-07 |
| 9559292 | Self-limited crack etch to prevent device shorting | Brian A. Bryce, Josephine B. Chang | 2017-01-31 |
| 9508801 | Stacked graphene field-effect transistor | Aaron D. Franklin, Satoshi Oida, Joshua T. Smith | 2016-11-29 |
| 9493879 | Selective sputtering for pattern transfer | Mark Hoinkis, Eric A. Joseph | 2016-11-15 |
| 9484220 | Sputter etch processing for heavy metal patterning in integrated circuits | Mark Hoinkis, Eric A. Joseph, Chun Yan | 2016-11-01 |
| 9472499 | Self-aligned pitch split for unidirectional metal wiring | Josephine B. Chang, Michael A. Guillorn, Eric A. Joseph | 2016-10-18 |
| 9437443 | Low-temperature sidewall image transfer process using ALD metals, metal oxides and metal nitrides | Markus Brink, Michael A. Guillorn, Sebastian U. Engelmann, Adam M. Pyzyna, Jeffrey W. Sleight | 2016-09-06 |
| 9349640 | Electrode pair fabrication using directed self assembly of diblock copolymers | Josephine B. Chang, Michael A. Guillorn, Adam M. Pyzyna, HsinYu Tsai | 2016-05-24 |
| 9337033 | Dielectric tone inversion materials | Martin Glodde, Wu-Song Huang, Ratnam Sooriyakumaran, HsinYu Tsai | 2016-05-10 |
| 9318692 | Self-limited crack etch to prevent device shorting | Brian A. Bryce, Josephine B. Chang | 2016-04-19 |