Issued Patents All Time
Showing 26–50 of 112 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10120803 | Transactional memory coherence control | Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz, Timothy J. Slegel | 2018-11-06 |
| 10102375 | Multi-modal memory hierarchical management for mitigating side-channel attacks in the cloud | Rosario Cammarota, Roberto Avanzi, Ramesh Chandra Chauhan, Darren Lasko | 2018-10-16 |
| 10083076 | Salvaging lock elision transactions with instructions to change execution type | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2018-09-25 |
| 9971628 | Salvaging hardware transactions | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz | 2018-05-15 |
| 9971626 | Coherence protocol augmentation to indicate transaction status | Fadi Y. Busaba, Michael K. Gschwind, Christian Jacobi, Valentina Salapura, Eric M. Schwarz +1 more | 2018-05-15 |
| 9952943 | Salvaging hardware transactions | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz | 2018-04-24 |
| 9928158 | Redundant transactions for detection of timing sensitive errors | David M. Daly, Michael C. Huang, Kattamuri Ekanadham, Jose E. Moreira, Mauricio J. Serrano | 2018-03-27 |
| 9870384 | Database system transaction management | Donna N. Dillenberger, Michel H. T. Hack, Hong Min, Gong Su, James Zu-Chia Teng | 2018-01-16 |
| 9846593 | Predicting the length of a transaction | Jonathan D. Bradbury, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum +1 more | 2017-12-19 |
| 9817693 | Coherence protocol augmentation to indicate transaction status | Fadi Y. Busaba, Michael K. Gschwind, Christian Jacobi, Valentina Salapura, Eric M. Schwarz +1 more | 2017-11-14 |
| 9804967 | Methods of cache preloading on a partition or a context switch | Vijayalakshmi Srinivasan, Jason D. Zebchuk | 2017-10-31 |
| 9772786 | Address probing for transaction | Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael, Eric M. Schwarz +2 more | 2017-09-26 |
| 9772874 | Prioritization of transactions based on execution by transactional core with super core indicator | Fadi Y. Busaba, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz, Timothy J. Slegel | 2017-09-26 |
| 9766829 | Address probing for transaction | Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Maged M. Michael, Eric M. Schwarz +2 more | 2017-09-19 |
| 9766937 | Thread-based cache content saving for task switching | David M. Daly, Brian R. Prasky, Vijayalakshmi Srinivasan | 2017-09-19 |
| 9760133 | Locking power supplies | David M. Daly, Jose E. Moreira | 2017-09-12 |
| 9753764 | Alerting hardware transactions that are about to run out of space | Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura | 2017-09-05 |
| 9740616 | Multi-granular cache management in multi-processor computing environments | Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz +1 more | 2017-08-22 |
| 9710271 | Collecting transactional execution characteristics during transactional execution | Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz +1 more | 2017-07-18 |
| 9703560 | Collecting transactional execution characteristics during transactional execution | Fadi Y. Busaba, Dan F. Greiner, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz +1 more | 2017-07-11 |
| 9697128 | Prefetch threshold for cache restoration | David M. Daly, Brian R. Prasky, Vijayalakshmi Srinivasan | 2017-07-04 |
| 9697126 | Generating approximate usage measurements for shared cache memory systems | Derek Robert Hower | 2017-07-04 |
| 9696928 | Memory transaction having implicit ordering effects | Kattamuri Ekanadham, Maged M. Michael, Pratap C. Pattnaik, Derek E. Williams | 2017-07-04 |
| 9696927 | Memory transaction having implicit ordering effects | Kattamuri Ekanadham, Maged M. Michael, Pratap C. Pattnaik, Derek E. Williams | 2017-07-04 |
| 9678875 | Providing shared cache memory allocation control in shared cache memory systems | Derek Robert Hower | 2017-06-13 |