Issued Patents All Time
Showing 276–300 of 496 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9761721 | Field effect transistors with self-aligned extension portions of epitaxial active regions | Tenko Yamashita | 2017-09-12 |
| 9754819 | Interlevel airgap dielectric | — | 2017-09-05 |
| 9754969 | Dual-material mandrel for epitaxial crystal growth on silicon | Sanghoon Lee, Brent A. Wacaser | 2017-09-05 |
| 9754935 | Raised metal semiconductor alloy for self-aligned middle-of-line contact | Christian Lavoie | 2017-09-05 |
| 9742147 | Monolithic integrated photonics with lateral bipolar and BiCMOS | Jin Cai, Ning Li, Tak H. Ning, Jean-Olivier Plouchart, Devendra K. Sadana | 2017-08-22 |
| 9735273 | Method of forming a III-V compound semiconductor channel post replacement gate | — | 2017-08-15 |
| 9735175 | Integrated circuit with heterogeneous CMOS integration of strained silicon germanium and group III-V semiconductor materials and method to fabricate same | Cheng-Wei Cheng, Pouya Hashemi, Alexander Reznicek | 2017-08-15 |
| 9728671 | Monolithic nano-cavity light source on lattice mismatched semiconductor substrate | Ning Li, Tak H. Ning, Jean-Oliver Plouchart, Devendra K. Sadana | 2017-08-08 |
| 9722031 | Reduced current leakage semiconductor device | Cheng-Wei Cheng, Pranita Kerber, Young-Hee Kim, Yanning Sun | 2017-08-01 |
| 9722022 | Sidewall image transfer nanosheet | Tenko Yamashita | 2017-08-01 |
| 9716056 | Integrated circuit with back side inductor | — | 2017-07-25 |
| 9716367 | Semiconductor optoelectronics and CMOS on sapphire substrate | Tymon Barwicz, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana | 2017-07-25 |
| 9716160 | Extended contact area using undercut silicide extensions | Soon-Cheon Seo, Tenko Yamashita, Chun-Chen Yeh | 2017-07-25 |
| 9716030 | Aspect ratio for semiconductor on insulator | — | 2017-07-25 |
| 9711648 | Structure and method for CMP-free III-V isolation | Chung-Hsun Lin, Amlan Majumdar, Yanning Sun | 2017-07-18 |
| 9711617 | Dual isolation fin and method of making | Cheng-Wei Cheng, Sanghoon Lee | 2017-07-18 |
| 9704866 | Integrated circuit having dual material CMOS integration and method to fabricate same | — | 2017-07-11 |
| 9704950 | Method to form SOI fins on a bulk substrate with suspended anchoring | — | 2017-07-11 |
| 9698239 | Growing groups III-V lateral nanowire channels | Sanghoon Lee, Renee T. Mo, Brent A. Wacaser | 2017-07-04 |
| 9698225 | Localized and self-aligned punch through stopper doping for finFET | Tenko Yamashita | 2017-07-04 |
| 9687181 | Semiconductor device to be embedded within a contact lens | Ghavam G. Shahidi | 2017-06-27 |
| 9691709 | Semiconductor device security | — | 2017-06-27 |
| 9685329 | Embedded gallium-nitride in silicon | William J. Gallagher, Devendra K. Sadana, Ghavam G. Shahidi | 2017-06-20 |
| 9685521 | Lowering parasitic capacitance of replacement metal gate processes | Vijay Narayanan | 2017-06-20 |
| 9685501 | Low parasitic capacitance finFET device | — | 2017-06-20 |