| 10379776 |
Operation interlocking in an address-sliced cache system |
Michael A. Blake, Ashraf ElSharif, Kenneth D. Klapproth, Pak-kin Mak, Robert J. Sonnelitter, III +1 more |
2019-08-13 |
| 10310982 |
Target cache line arbitration within a processor cluster |
Johnathon J. Hoste, Pak-kin Mak, Arthur J. O'Neill, Robert J. Sonnelitter, III |
2019-06-04 |
| 10176013 |
Dual/multi-mode processor pipeline sampling |
Kathryn Marie Jackson, Joshua D. Massover, Gary E. Strait, Hanno Ulrich, Craig R. Walters |
2019-01-08 |
| 10169260 |
Multiprocessor cache buffer management |
Ekaterina M. Ambroladze, Michael Fee, Arthur J. O'Neill |
2019-01-01 |
| 10055355 |
Non-disruptive clearing of varying address ranges from cache |
Ekaterina M. Ambroladze, Michael A. Blake, Pak-kin Mak, Robert J. Sonnelitter, III, Guy G. Tracy +1 more |
2018-08-21 |
| 9898407 |
Configuration based cache coherency protocol selection |
Ekaterina M. Ambroladze, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III |
2018-02-20 |
| 9892067 |
Multiprocessor cache buffer management |
Ekaterina M. Ambroladze, Michael Fee, Arthur J. O'Neill |
2018-02-13 |
| 9886382 |
Configuration based cache coherency protocol selection |
Ekaterina M. Ambroladze, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III |
2018-02-06 |
| 9792213 |
Mitigating busy time in a high performance cache |
Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf, Robert J. Sonnelitter, III |
2017-10-17 |
| 9594689 |
Designated cache data backup during system operation |
Ekaterina M. Ambroladze, Garrett M. Drapala, Michael Fee, Pak-kin Mak, Arthur J. O'Neill +1 more |
2017-03-14 |
| 9501283 |
Cross-pipe serialization for multi-pipeline processor |
Michael Fee, Edward J. Kaminski, Jr., Diane L. Orf |
2016-11-22 |
| 9477613 |
Position-based replacement policy for address synonym management in shared caches |
Michael Fee, Arthur O'Neil, Robert J. Sonnelitter, III |
2016-10-25 |
| 9459998 |
Operations interlock under dynamic relocation of storage |
Michael A. Blake, Garrett M. Drapala, James F. Driftmyer, Pak-kin Mak, Timothy J. Slegel +1 more |
2016-10-04 |
| 9378023 |
Cross-pipe serialization for multi-pipeline processor |
Michael Fee, Edward J. Kaminski, Jr., Diane L. Orf |
2016-06-28 |
| 9298468 |
Monitoring processing time in a shared pipeline |
Ekaterina M. Ambroladze, Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf +1 more |
2016-03-29 |
| 9158694 |
Mitigating busy time in a high performance cache |
Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf, Robert J. Sonnelitter, III |
2015-10-13 |
| 9104583 |
On demand allocation of cache buffer slots |
Ekaterina M. Ambroladze, Michael Fee, Christine C. Jones, Diana L. Orf |
2015-08-11 |
| 9037806 |
Reducing store operation busy times |
Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diane L. Orf |
2015-05-19 |
| 9015423 |
Reducing store operation busy times |
Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diane L. Orf |
2015-04-21 |
| 8930628 |
Managing in-line store throughput reduction |
Michael Fee, Christine C. Jones, Diana L. Orf, Robert J. Sonnelitter, III |
2015-01-06 |
| 8671267 |
Monitoring processing time in a shared pipeline |
Ekaterina M. Ambroladze, Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf +1 more |
2014-03-11 |
| 8645628 |
Dynamically supporting variable cache array busy and access times for a targeted interleave |
Michael Fee, Arthur J. O'Neill |
2014-02-04 |
| 8639887 |
Dynamically altering a pipeline controller mode based on resource availability |
Michael Fee, Kenneth D. Klapproth, Robert J. Sonnelitter, III |
2014-01-28 |
| 8521960 |
Mitigating busy time in a high performance cache |
Michael Fee, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf, Robert J. Sonnelitter, III |
2013-08-27 |
| 8522076 |
Error detection and recovery in a shared pipeline |
Ekaterina M. Ambroladze, Michael Fee, Arthur J. O'Neill, Diana L. Orf, Robert J. Sonnelitter, III |
2013-08-27 |