Issued Patents All Time
Showing 51–75 of 264 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10346162 | Selective instruction replacement for assembly language programs | John Robert Dravnieks, John R. Ehrman | 2019-07-09 |
| 10318300 | Parsing-enhancement facility | John R. Ehrman | 2019-06-11 |
| 10313109 | Instruction for performing a pseudorandom number seed operation | Bernd Nerz, Tamas Visegrady | 2019-06-04 |
| 10282327 | Test pending external interruption instruction | Mark S. Farrell, Jeffrey P. Kubala, James H. Mulder, Timothy J. Slegel | 2019-05-07 |
| 10241910 | Creating a dynamic address translation with translation exception qualifiers | Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer | 2019-03-26 |
| 10235174 | Conditional instruction end operation | Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2019-03-19 |
| 10235138 | Instruction to provide true random numbers | Bernd Nerz, Timothy J. Slegel, Tamas Visegrady, Christian Zoellin | 2019-03-19 |
| 10228943 | Prefetching of discontiguous storage locations in anticipation of transactional execution | Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz +1 more | 2019-03-12 |
| 10223283 | Selective purging of PCI I/O address translation buffer | David F. Craddock, Thomas A. Gregg, Damian L. Osisek | 2019-03-05 |
| 10223214 | Randomized testing within transactional execution | Christian Jacobi, Timothy J. Slegel | 2019-03-05 |
| 10223154 | Hint instruction for managing transactional aborts in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura +2 more | 2019-03-05 |
| 10216518 | Clearing specified blocks of main storage | Anthony F. Coneski, Beth A. Glendening, Peter G. Sutton, Scott B. Tuttle, Elpida Tzortzatos | 2019-02-26 |
| 10216517 | Clearing specified blocks of main storage | Anthony F. Coneski, Beth A. Glendening, Peter G. Sutton, Scott B. Tuttle, Elpida Tzortzatos | 2019-02-26 |
| 10210019 | Hint instruction for managing transactional aborts in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura +2 more | 2019-02-19 |
| 10185588 | Transaction begin/end instructions | Christian Jacobi, Marcel Mitran, Timothy J. Slegel | 2019-01-22 |
| 10169038 | Compare and delay instructions | Charles W. Gainey, Jr., Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2019-01-01 |
| 10169267 | Transactional execution enabled supervisor call interruption while in TX mode | Jonathan D. Bradbury, Michael K. Gschwind, Chung-Lung K. Shum | 2019-01-01 |
| 10169239 | Managing a prefetch queue based on priority indications of prefetch requests | Michael K. Gschwind, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2019-01-01 |
| 10152307 | Specifying user defined or translator definitions to use to interpret mnemonics in a computer program | John Robert Dravnieks, John R. Ehrman | 2018-12-11 |
| 10133575 | Instruction for performing a pseudorandom number generate operation | Bernd Nerz, Tamas Visegrady | 2018-11-20 |
| 10120681 | Compare and delay instructions | Charles W. Gainey, Jr., Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2018-11-06 |
| 10089111 | Performing an operation absent host intervention | Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Gustav E. Sittmann, III | 2018-10-02 |
| 10078585 | Creating a dynamic address translation with translation exception qualifiers | Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer | 2018-09-18 |
| 10061585 | Instruction for performing a pseudorandom number generate operation | Bernd Nerz, Tamas Visegrady | 2018-08-28 |
| 10025589 | Conditional transaction end instruction | Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2018-07-17 |