Issued Patents All Time
Showing 26–50 of 264 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10671390 | Conditional instruction end operation | Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2020-06-02 |
| 10664269 | Function virtualization facility for function query of a processor | Damian L. Osisek, Timothy J. Slegel | 2020-05-26 |
| 10606597 | Nontransactional store instruction | Christian Jacobi, Timothy J. Slegel | 2020-03-31 |
| 10599435 | Nontransactional store instruction | Christian Jacobi, Timothy J. Slegel | 2020-03-24 |
| 10585697 | Dynamic prediction of hardware transaction resource requirements | Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2020-03-10 |
| 10579377 | Guarded storage event handling during transactional execution | Christian Jacobi, Volodymyr Paprotski, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2020-03-03 |
| 10572301 | Extract CPU time facility | — | 2020-02-25 |
| 10572298 | Dynamic prediction of hardware transaction resource requirements | Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2020-02-25 |
| 10572254 | Instruction to query cache residency | Michael K. Gschwind, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2020-02-25 |
| 10565003 | Hint instruction for managing transactional aborts in transactional memory computing environments | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Valentina Salapura +2 more | 2020-02-18 |
| 10558465 | Restricted instructions in transactional execution | Christian Jacobi, Timothy J. Slegel | 2020-02-11 |
| 10534589 | Specifying user defined or translator definitions to use to interpret mnemonics in a computer program | John Robert Dravnieks, John R. Ehrman | 2020-01-14 |
| 10521231 | Function virtualization facility for blocking instruction function of a multi-function instruction of a virtual processor | Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel | 2019-12-31 |
| 10496292 | Saving/restoring guarded storage controls in a virtualized environment | Christian Jacobi, Damian L. Osisek, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2019-12-03 |
| 10496311 | Run-time instrumentation of guarded storage event processing | Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2019-12-03 |
| 10452288 | Identifying processor attributes based on detecting a guarded storage event | Christian Jacobi, Marcel Mitran, Volodymyr Paprotski, Anthony Saporito, Timothy J. Slegel | 2019-10-22 |
| 10452395 | Instruction to query cache residency | Michael K. Gschwind, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2019-10-22 |
| 10437602 | Program interruption filtering in transactional execution | Christian Jacobi, Marcel Mitran, Timothy J. Slegel | 2019-10-08 |
| 10430199 | Program interruption filtering in transactional execution | Christian Jacobi, Marcel Mitran, Timothy J. Slegel | 2019-10-01 |
| 10423191 | Clock comparator sign control | Eberhard Engler, Michel H. T. Hack, Timothy J. Slegel, Joachim von Buttlar | 2019-09-24 |
| 10423539 | Dynamic address translation with access control in an emulator environment | Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer, Timothy J. Slegel +1 more | 2019-09-24 |
| 10387323 | Extract target cache attribute facility and instruction therefor | Timothy J. Slegel | 2019-08-20 |
| 10360032 | Performing an operation absent host intervention | Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Gustav E. Sittmann, III | 2019-07-23 |
| 10360033 | Conditional transaction end instruction | Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2019-07-23 |
| 10346162 | Selective instruction replacement for assembly language programs | John Robert Dravnieks, John R. Ehrman | 2019-07-09 |