Issued Patents All Time
Showing 101–125 of 264 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9811337 | Transaction abort processing | Christian Jacobi, Timothy J. Slegel | 2017-11-07 |
| 9804846 | Thread context preservation in a multithreading computer system | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more | 2017-10-31 |
| 9804847 | Thread context preservation in a multithreading computer system | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more | 2017-10-31 |
| 9792125 | Saving/restoring selected registers in transactional processing | Christian Jacobi, Timothy J. Slegel | 2017-10-17 |
| 9772867 | Control area for managing multiple threads in a computer | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more | 2017-09-26 |
| 9772854 | Selectively controlling instruction execution in transactional processing | Christian Jacobi, Robert R. Rogers, Timothy J. Slegel | 2017-09-26 |
| 9772786 | Address probing for transaction | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Eric M. Schwarz +2 more | 2017-09-26 |
| 9766925 | Transactional processing | Christian Jacobi, Timothy J. Slegel | 2017-09-19 |
| 9766829 | Address probing for transaction | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Eric M. Schwarz +2 more | 2017-09-19 |
| 9760511 | Efficient interruption routing for a multithreaded processor | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +7 more | 2017-09-12 |
| 9760397 | Interprocessor memory status communication | Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel | 2017-09-12 |
| 9740521 | Constrained transaction execution | Christian Jacobi, Timothy J. Slegel | 2017-08-22 |
| 9727370 | Collecting memory operand access characteristics during transactional execution | Michael K. Gschwind, Valentina Salapura, Timothy J. Slegel | 2017-08-08 |
| 9727335 | Clearing specified blocks of main storage | Anthony F. Coneski, Beth A. Glendening, Peter G. Sutton, Scott B. Tuttle, Elpida Tzortzatos | 2017-08-08 |
| 9720725 | Prefetching of discontiguous storage locations as part of transactional execution | Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz +1 more | 2017-08-01 |
| 9710271 | Collecting transactional execution characteristics during transactional execution | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz +1 more | 2017-07-18 |
| 9703718 | Managing read tags in a transactional memory | Michael K. Gschwind, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel | 2017-07-11 |
| 9703560 | Collecting transactional execution characteristics during transactional execution | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura, Eric M. Schwarz +1 more | 2017-07-11 |
| 9680653 | Cipher message with authentication instruction | Jonathan D. Bradbury, Reinhard T. Buendgen, Christian Jacobi, Volodymyr Paprotski, Aditya N. Puranik +3 more | 2017-06-13 |
| 9632820 | Prefetching of discontiguous storage locations in anticipation of transactional execution | Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz +1 more | 2017-04-25 |
| 9632819 | Collecting memory operand access characteristics during transactional execution | Michael K. Gschwind, Valentina Salapura, Timothy J. Slegel | 2017-04-25 |
| 9626298 | Translation of input/output addresses to memory addresses | David F. Craddock, Thomas A. Gregg, Eric N. Lais | 2017-04-18 |
| 9606799 | Performing a clear operation absent host intervention | Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Gustav E. Sittmann, III | 2017-03-28 |
| 9594661 | Method for executing a query instruction for idle time accumulation among cores in a multithreading computer system | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more | 2017-03-14 |
| 9594660 | Multithreading computer system and program product for executing a query instruction for idle time accumulation among cores | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more | 2017-03-14 |