Issued Patents All Time
Showing 126–150 of 264 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9569217 | Parsing-enhancement facility | John R. Ehrman | 2017-02-14 |
| 9558032 | Conditional instruction end operation | Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2017-01-31 |
| 9547523 | Conditional instruction end operation | Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2017-01-17 |
| 9529598 | Transaction abort instruction | Christian Jacobi, Marcel Mitran, Timothy J. Slegel | 2016-12-27 |
| 9524257 | Transactional execution enabled supervisor call interruption while in TX mode | Jonathan D. Bradbury, Michael K. Gschwind, Chung-Lung K. Shum | 2016-12-20 |
| 9524187 | Executing instruction with threshold indicating nearing of completion of transaction | Jonathan D. Bradbury, Michael K. Gschwind, Maged M. Michael, Chung-Lung K. Shum | 2016-12-20 |
| 9495306 | Dynamic management of a processor state with transient cache memory | Jonathan D. Bradbury, Michael K. Gschwind, Christian Jacobi, Younes Manton, Anthony Saporito +3 more | 2016-11-15 |
| 9483436 | PCI function measurement block enhancements | David F. Craddock, Beth A. Glendening, Thomas A. Gregg | 2016-11-01 |
| 9477514 | Transaction begin/end instructions | Christian Jacobi, Marcel Mitran, Timothy J. Slegel | 2016-10-25 |
| 9471371 | Dynamic prediction of concurrent hardware transactions resource requirements and allocation | Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2016-10-18 |
| 9465768 | PCI function measurement block enhancements | David F. Craddock, Beth A. Glendening, Thomas A. Gregg | 2016-10-11 |
| 9459875 | Dynamic enablement of multithreading | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +5 more | 2016-10-04 |
| 9459872 | High-word facility for extending the number of general purpose registers available to instructions | Marcel Mitran, Timothy J. Slegel | 2016-10-04 |
| 9454372 | Thread context restoration in a multithreading computer system | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more | 2016-09-27 |
| 9454370 | Conditional transaction end instruction | Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2016-09-27 |
| 9448939 | Collecting memory operand access characteristics during transactional execution | Michael K. Gschwind, Valentina Salapura, Timothy J. Slegel | 2016-09-20 |
| 9448796 | Restricted instructions in transactional execution | Christian Jacobi, Timothy J. Slegel | 2016-09-20 |
| 9448797 | Restricted instructions in transactional execution | Christian Jacobi, Timothy J. Slegel | 2016-09-20 |
| 9442747 | Specifying user defined or translator definitions to use to interpret mnemonics in a computer program | John Robert Dravnieks, John R. Ehrman | 2016-09-13 |
| 9436477 | Transaction abort instruction | Christian Jacobi, Marcel Mitran, Timothy J. Slegel | 2016-09-06 |
| 9424000 | Instruction for performing a pseudorandom number seed operation | Bernd Nerz, Tamas Visegrady | 2016-08-23 |
| 9424035 | Conditional transaction end instruction | Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2016-08-23 |
| 9417876 | Thread context restoration in a multithreading computer system | Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more | 2016-08-16 |
| 9396125 | Dynamic management of memory ranges exempted from cache memory access | Jonathan D. Bradbury, Michael K. Gschwind, Christian Jacobi, Younes Manton, Anthony Saporito +2 more | 2016-07-19 |
| 9395998 | Selectively controlling instruction execution in transactional processing | Christian Jacobi, Robert R. Rogers, Timothy J. Slegel | 2016-07-19 |