Issued Patents All Time
Showing 426–450 of 542 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7791928 | Design structure, structure and method of using asymmetric junction engineered SRAM pass gates | Edward J. Nowak | 2010-09-07 |
| 7785955 | CMOS structure and method including multiple crystallographic planes | Edward J. Nowak, Jed H. Rankin | 2010-08-31 |
| 7781283 | Split-gate DRAM with MuGFET, design structure, and method of manufacture | Edward J. Nowak | 2010-08-24 |
| 7772647 | Structure and design structure having isolated back gates for fully depleted SOI devices | Edward J. Nowak | 2010-08-10 |
| 7772656 | Combination planar FET and FinFET device | Bryant Andres, William F. Clark, Jr., Edward J. Nowak | 2010-08-10 |
| 7759179 | Multi-gated, high-mobility, density improved devices | Andres Bryant, Edward J. Nowak | 2010-07-20 |
| 7759773 | Semiconductor wafer structure with balanced reflectance and absorption characteristics for rapid thermal anneal uniformity | Edward J. Nowak | 2010-07-20 |
| 7745909 | Localized temperature control during rapid thermal anneal | Edward J. Nowak | 2010-06-29 |
| 7741184 | Fin device with capacitor integrated under gate electrode | Andres Bryant, Edward J. Nowak | 2010-06-22 |
| 7741672 | Bridged gate FinFet | Andres Bryant, Edward J. Nowak | 2010-06-22 |
| 7732859 | Graphene-based transistor | Edward J. Nowak | 2010-06-08 |
| 7718489 | Double-gate FETs (field effect transistors) | Andres Bryant, Edward J. Nowak | 2010-05-18 |
| 7709892 | Semiconductor device having freestanding semiconductor layer | Edward J. Nowak, BethAnn Rainey | 2010-05-04 |
| 7701058 | Undoped polysilicon metal silicide wiring | Edward J. Nowak | 2010-04-20 |
| 7700446 | Virtual body-contacted trigate | Matthew J. Breitwisch, Edward J. Nowak, BethAnn Rainey | 2010-04-20 |
| 7692275 | Structure and method for device-specific fill for improved anneal uniformity | Edward J. Nowak | 2010-04-06 |
| 7692254 | Fin-type field effect transistor structure with merged source/drain silicide and method of forming the structure | Andres Bryant, John J. Ellis-Monaghan, Edward J. Nowak | 2010-04-06 |
| 7685557 | Radiation mask with spatially variable transmissivity | Edward J. Nowak | 2010-03-23 |
| 7682941 | Integrated circuit with bulk and SOI devices connected with an epitaxial region | Edward J. Nowak | 2010-03-23 |
| 7679166 | Localized temperature control during rapid thermal anneal | Edward J. Nowak | 2010-03-16 |
| 7671442 | Air-gap insulated interconnections | Andres Bryant, Jeffrey P. Gambino, Anthony K. Stamper | 2010-03-02 |
| 7661077 | Structure for imagers having electrically active optical elements | John J. Ellis-Monaghan, Edward J. Nowak | 2010-02-09 |
| 7659579 | FETS with self-aligned bodies and backgate holes | Andres Bryant, Edward J. Nowak, Richard Q. Williams | 2010-02-09 |
| 7659155 | Method of forming a transistor having gate and body in direct self-aligned contact | Andres Bryant, William F. Clark, Jr., Edward J. Nowak | 2010-02-09 |
| 7649243 | Semiconductor structures incorporating multiple crystallographic planes and methods for fabrication thereof | Edward J. Nowak, Jed H. Rankin | 2010-01-19 |