Issued Patents All Time
Showing 76–100 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7990795 | Dynamic random access memory (DRAM) refresh | George P. Hoekstra | 2011-08-02 |
| 7941637 | Groups of serially coupled processor cores propagating memory write packet while maintaining coherency within each group towards a switch coupled to memory partitions | George P. Hoekstra, Lucio F. C. Pessoa | 2011-05-10 |
| 7902915 | Method and circuit for charging and discharging a circuit node | — | 2011-03-08 |
| 7791367 | Driver with selectable output impedance | — | 2010-09-07 |
| 7777330 | High bandwidth cache-to-processing unit communication in a multiple processor/cache system | Michael B. McShane | 2010-08-17 |
| 7706207 | Memory with level shifting word line driver and method thereof | Thomas W. Liston, Shahnaz P. Chowdhury-Nagle | 2010-04-27 |
| 7669100 | System and method for testing and providing an integrated circuit having multiple modules or submodules | — | 2010-02-23 |
| 7668029 | Memory having sense time of variable duration | William C. Moyer | 2010-02-23 |
| 7638903 | Power supply selection for multiple circuits on an integrated circuit | William C. Moyer | 2009-12-29 |
| 7573101 | Embedded substrate interconnect for underside contact to source and drain regions | Troy L. Cooper, Michael A. Mendicino | 2009-08-11 |
| 7564738 | Double-rate memory | George P. Hoekstra | 2009-07-21 |
| 7492627 | Memory with increased write margin bitcells | Andrew C. Russell, Prashant U. Kenkare | 2009-02-17 |
| 7484140 | Memory having variable refresh control and method therefor | John M. Burgan | 2009-01-27 |
| 7440354 | Memory with level shifting word line driver and method thereof | Thomas W. Liston, Shahnaz P. Chowdhury-Nagle | 2008-10-21 |
| 7430151 | Memory with clocked sense amplifier | — | 2008-09-30 |
| 7345344 | Embedded substrate interconnect for underside contact to source and drain regions | Troy L. Cooper, Michael A. Mendicino | 2008-03-18 |
| 7285976 | Integrated circuit with programmable-impedance output buffer and method therefor | — | 2007-10-23 |
| 7242626 | Method and apparatus for low voltage write in a static random access memory | Ravindraraj Ramaraju, Prashant U. Kenkare | 2007-07-10 |
| 7221613 | Memory with serial input/output terminals for address and data and method therefor | Carlos A. Greaves | 2007-05-22 |
| 7088632 | Automatic hidden refresh in a dram and method therefor | — | 2006-08-08 |
| 6998952 | Inductive device including bond wires | Yaping Zhou, Susan H. Downey, Sheila F. Chopin, Tu-Anh N. Tran, Alan H. Woosley +1 more | 2006-02-14 |
| 6862208 | Memory device with sense amplifier and self-timed latch | Jeremiah Palmer | 2005-03-01 |
| 6838721 | Integrated circuit with a transitor over an interconnect layer | Bradley J. Garni | 2005-01-04 |
| 6781908 | Memory having variable refresh control and method therefor | John M. Burgan | 2004-08-24 |
| 6765816 | Storage circuit having single-ended write circuitry | — | 2004-07-20 |