Issued Patents All Time
Showing 51–75 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8872578 | Self adjusting reference for input buffer | — | 2014-10-28 |
| 8867263 | Multiport memory with matching address and data line control | — | 2014-10-21 |
| 8861243 | Four port memory with multiple cores | Peter J. Wilson | 2014-10-14 |
| 8861289 | Multiport memory with matching address control | — | 2014-10-14 |
| 8848480 | Synchronous multiple port memory with asynchronous ports | — | 2014-09-30 |
| 8836371 | Systems and methods for reduced coupling between digital signal lines | James D. Burnett | 2014-09-16 |
| 8837205 | Multi-port register file with multiplexed data | Ravindraraj Ramaraju, Andrew C. Russell | 2014-09-16 |
| 8796855 | Semiconductor devices with nonconductive vias | Michael B. McShane, Tab A. Stephens | 2014-08-05 |
| 8796822 | Stacked semiconductor devices | Kevin J. Hess, Michael B. McShane | 2014-08-05 |
| 8786350 | Transmission system | — | 2014-07-22 |
| 8680674 | Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices | Michael B. McShane, Kevin J. Hess, Tab A. Stephens | 2014-03-25 |
| 8659964 | Bipolar primary sense amplifier | — | 2014-02-25 |
| 8611128 | ROM memory device | — | 2013-12-17 |
| 8476962 | System having multiple voltage tiers and method therefor | — | 2013-07-02 |
| 8402327 | Memory system with error correction and method of operation | George P. Hoekstra, Peter J. Wilson | 2013-03-19 |
| 8400859 | Dynamic random access memory (DRAM) refresh | George P. Hoekstra | 2013-03-19 |
| 8345469 | Static random access memory (SRAM) having bit cells accessible by separate read and write paths | Ravindraraj Ramaraju | 2013-01-01 |
| 8294483 | Testing of multiple integrated circuits | Lucio F. C. Pessoa | 2012-10-23 |
| 8260151 | Optical communication integration | Dennis C. Hartman | 2012-09-04 |
| 8169257 | System and method for communicating between multiple voltage tiers | — | 2012-05-01 |
| 8120412 | Voltage boosting system with slew rate control and method thereof | — | 2012-02-21 |
| 8090913 | Coherency groups of serially coupled processing cores propagating coherency information containing write packet to memory | George P. Hoekstra, Lucio F. C. Pessoa | 2012-01-03 |
| 8032030 | Multiple core system | Lucio F. C. Pessoa | 2011-10-04 |
| 8014682 | Free-space optical communication system | Lucio F. C. Pessoa | 2011-09-06 |
| 8004080 | Edge mounted integrated circuits with heat sink | Michael B. McShane | 2011-08-23 |