PP

Perry H. Pelley

FS Freeescale Semiconductor: 83 patents #5 of 3,767Top 1%
Motorola: 28 patents #164 of 12,470Top 2%
NU Nxp Usa: 17 patents #65 of 2,066Top 4%
IN Intel: 1 patents #18,218 of 30,777Top 60%
🗺 Texas: #267 of 125,132 inventorsTop 1%
Overall (All Time): #8,440 of 4,157,543Top 1%
130
Patents All Time

Issued Patents All Time

Showing 101–125 of 130 patents

Patent #TitleCo-InventorsDate
6760268 Method and apparatus for establishing a reference voltage in a memory 2004-07-06
6608789 Hysteresis reduced sense amplifier and method of operation Steven C. Sullivan, George P. Hoekstra 2003-08-19
6323704 Multiple voltage compatible I/O buffer Kevin Tran 2001-11-27
6169420 Output buffer John Coddington 2001-01-02
5760626 BICMOS latch circuit for latching differential signals 1998-06-02
5726944 Voltage regulator for regulating an output voltage from a charge pump and method therefor Robert C. Taft 1998-03-10
5721509 Charge pump having reduced threshold voltage losses Robert C. Taft 1998-02-24
5572467 Address comparison in an inteagrated circuit memory having shared read global data lines Hamed Ghassemi, Scott G. Nogle 1996-11-05
5502676 Integrated circuit memory with column redundancy having shared read global data lines Hamed Ghassemi 1996-03-26
5323360 Localized ATD summation for a memory 1994-06-21
5315179 BICMOS level converter circuit Hamed Ghassemi 1994-05-24
5313120 Address buffer with ATD generation 1994-05-17
5309039 Power supply dependent input buffer Hamed Ghassemi 1994-05-03
5303190 Static random access memory resistant to soft error 1994-04-12
5278464 Using delay to obtain high speed current driver circuit Hamed Ghassemi 1994-01-11
5140191 Low di/dt BiCMOS output buffer with improved speed Scott G. Nogle 1992-08-18
5040144 Integrated circuit with improved power supply distribution Tim P. Egging 1991-08-13
4943743 TTL to ECL input buffer Ruey J. Yu 1990-07-24
4928268 Memory using distributed data line loading Scott G. Nogle, Stephen T. Flannagan, Bruce E. Engles 1990-05-22
4806799 ECL to CMOS translator Ruey J. Yu, Scott G. Nogle 1989-02-21
4802129 RAM with dual precharge circuit and write recovery circuitry George P. Hoekstra 1989-01-31
4800531 Address buffer circuit for a dram Sam Dehganpour 1989-01-24
4794434 Trench cell for a dram 1988-12-27
4791615 Memory with redundancy and predecoded signals Bruce L. Morton 1988-12-13
4758743 Output buffer with improved di/dt Sam Dehganpour 1988-07-19