JC

John Coddington

AR Arteris: 12 patents #2 of 48Top 5%
Motorola: 9 patents #1,091 of 12,470Top 9%
TI Tandem Computers Incorporated: 3 patents #88 of 354Top 25%
NU Nxp Usa: 1 patents #1,089 of 2,066Top 55%
UF US Air Force: 1 patents #6,190 of 16,312Top 40%
HO Honeywell: 1 patents #7,507 of 14,447Top 55%
Oracle: 1 patents #8,282 of 14,854Top 60%
Overall (All Time): #135,179 of 4,157,543Top 4%
28
Patents All Time

Issued Patents All Time

Showing 25 most recent of 28 patents

Patent #TitleCo-InventorsDate
12411801 System and method for transaction broadcast in a network on chip Syed Ijlal Ali Shah, Benoit de LESCURE 2025-09-09
12340156 System and method for using interface protection parameters Sylvain Meliciani, Frederic Greus, Xavier Van Ruymbeke 2025-06-24
12335134 Network-on-chip (NoC) with a broadcast switch system Boon Chuan 2025-06-17
12038866 Broadcast adapters in a network-on-chip Syed Ijlal Ali Shah, Benoit de LESCURE 2024-07-16
11847394 System and method for using interface protection parameters Sylvain Meliciani, Frederic Greus, Xavier Van Ruymbeke 2023-12-19
11831557 Switch with virtual channels for soft locking in a network-on-chip (NoC) Benoit de LESCURE, Syed Ijlal Ali Shah, Sanjay Despande 2023-11-28
11805080 System and method for data loss and data latency management in a network-on-chip with buffered switches 2023-10-31
11757798 Management of a buffered switch having virtual channels for data transmission within a network 2023-09-12
11729088 Broadcast switch system in a network-on-chip (NoC) Boon Chuan 2023-08-15
11436185 System and method for transaction broadcast in a network on chip Syed Ijlal Ali Shah, Benoit de LESCURE 2022-09-06
11368402 System and method for using soft lock with virtual channels in a network-on-chip (NoC) Benoit de LESCURE, Syed Ijlal Ali Shah, Sanjay Despande 2022-06-21
11210445 System and method for interface protection Sylvain Meliciani, Frederic Greus, Xavier Van Ruymbeke 2021-12-28
10268604 Adaptive resource management in a pipelined arbiter 2019-04-23
9720847 Least recently used (LRU) cache replacement implementation using a FIFO storing indications of whether a way of the cache was most recently accessed Thang Q. Nguyen, Sanjay Deshpande 2017-08-01
6346829 High voltage input buffer made by a low voltage process and having a self-adjusting trigger point 2002-02-12
6326811 Output buffer and method therefor Perry H. Pelley III 2001-12-04
6294938 System with DLL Chau-Shing Hui 2001-09-25
6288599 High voltage input buffer made by a low voltage process and having a self-adjusting trigger point 2001-09-11
6169420 Output buffer Perry H. Pelley 2001-01-02
6151689 Detecting and isolating errors occurring in data communication in a multiple processor system David J. Garcia, William P. Bunton, John C. Krause, Susan S. Meredith, David P. Sonnier +2 more 2000-11-21
6147540 High voltage input buffer made by a low voltage process and having a self-adjusting trigger point 2000-11-14
6140854 System with DLL Chau-Shing Hui 2000-10-31
5751932 Fail-fast, fail-functional, fault-tolerant multiprocessor system Robert W. Horst, William E. Baker, Randall G. Banton, John M. Brown, William F. Bruckert +21 more 1998-05-12
5675807 Interrupt message delivery identified by storage location of received interrupt data Geoffrey Ignatius Iswandhi, William E. Baker, William P. Bunton, Daniel L. Fowler, David J. Garcia +6 more 1997-10-07
5668975 Method of requesting data by interlacing critical and non-critical data words of multiple data requests and apparatus therefor 1997-09-16