Issued Patents All Time
Showing 26–50 of 75 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11455575 | System and methods for mesh architecture for high bandwidth multicast and broadcast network | Dan Tu, Enrique Musoll, Chia-Hsin Chen | 2022-09-27 |
| 11403561 | Architecture to support synchronization between core and inference engine for machine learning | Gopal Nalamalapu | 2022-08-02 |
| 11340673 | System and method to manage power throttling | Srinivas Sripada, Ramacharan Sundararaman, Chia-Hsin Chen, Nikhil Jayakumar | 2022-05-24 |
| 11301247 | System and method for handling floating point hardware exception | Chia-Hsin Chen, Ulf Hanebutte, Rishan Tan, Soumya Gollamudi | 2022-04-12 |
| 11256517 | Architecture of crossbar of inference engine | Ulf Hanebutte, Senad Durakovic, Hamid Reza Ghasemi, Chia-Hsin Chen | 2022-02-22 |
| 11210105 | Data transmission between memory and on chip memory of inference engine for machine learning via a single data gathering instruction | — | 2021-12-28 |
| 11181967 | Power management and transitioning cores within a multicore system from idle mode to operational mode over a period of time | Chia-Hsin Chen, Atul Bhattarai, Srinivas Sripada | 2021-11-23 |
| 11086633 | Single instruction set architecture (ISA) format for multiple ISAS in machine learning inference engine | Ulf Hanebutte, Senad Durakovic, Hamid Reza Ghasemi, Chia-Hsin Chen | 2021-08-10 |
| 11029963 | Architecture for irregular operations in machine learning inference engine | Ulf Hanebutte, Senad Durakovic, Hamid Reza Ghasemi, Chia-Hsin Chen, Rishan Tan | 2021-06-08 |
| 11016801 | Architecture to support color scheme-based synchronization for machine learning | Senad Durakovic, Gopal Nalamalapu | 2021-05-25 |
| 10997510 | Architecture to support tanh and sigmoid operations for inference acceleration in machine learning | Ulf Hanebutte, Chia-Hsin Chen | 2021-05-04 |
| 10970080 | Systems and methods for programmable hardware architecture for machine learning | Chia-Hsin Chen, Ulf Hanebutte, Hamid Reza Ghasemi, Senad Durakovic | 2021-04-06 |
| 10929779 | Architecture to support synchronization between core and inference engine for machine learning | Gopal Nalamalapu | 2021-02-23 |
| 10929778 | Address interleaving for machine learning | Ramacharan Sundararaman | 2021-02-23 |
| 10929760 | Architecture for table-based mathematical operations for inference acceleration in machine learning | Ulf Hanebutte, Chia-Hsin Chen | 2021-02-23 |
| 10896045 | Architecture for dense operations in machine learning inference engine | Ulf Hanebutte, Senad Durakovic, Hamid Reza Ghasemi, Chia-Hsin Chen | 2021-01-19 |
| 10891136 | Data transmission between memory and on chip memory of inference engine for machine learning via a single data gathering instruction | — | 2021-01-12 |
| 10824433 | Array-based inference engine for machine learning | Ulf Hanebutte, Senad Durakovic, Hamid Reza Ghasemi, Chia-Hsin Chen | 2020-11-03 |
| 10346300 | Providing multiple memory modes for a processor including internal memory | Robert J. Kyanko, Richard J. Greco, Andreas Kleen, Milind B. Girkar, Christopher M. Cantalupo | 2019-07-09 |
| 10275001 | Thermal throttling of electronic devices | Timothy Y. Kam, Sandeep Ahuja, Rajat Agarwal, Jinho Suh, Meenakshisundaram R. Chinthamani | 2019-04-30 |
| 10102129 | Minimizing snoop traffic locally and across cores on a chip multi-core fabric | Krishna N. Vinod, Zainulabedin J. Aurangabadwala | 2018-10-16 |
| 9898351 | Method and apparatus for user-level thread synchronization with a monitor and MWAIT architecture | Benjamin Crawford Chaffin, Robert J. Kyanko | 2018-02-20 |
| 9886396 | Scalable event handling in multi-threaded processor cores | Roger Gramunt, Rammohan Padmanabhan, Ramon Matas, Neal S. Moyer, Benjamin Crawford Chaffin +7 more | 2018-02-06 |
| 9836399 | Mechanism to avoid hot-L1/cold-L2 events in an inclusive L2 cache using L1 presence bits for victim selection bias | Krishna N. Vinod, Zainulabedin J. Aurangabadwala | 2017-12-05 |
| 9733939 | Physical reference list for tracking physical register sharing | Vijaykumar B. Kadgi, James Hadley, Matthew C. Merten, Morris Marden, Joseph A. McMahon +4 more | 2017-08-15 |