Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12169719 | Instruction set architecture (ISA) format for multiple instruction set architectures in machine learning inference engine | Avinash Sodani, Ulf Hanebutte, Senad Durakovic, Chia-Hsin Chen | 2024-12-17 |
| 12112174 | Streaming engine for machine learning architecture | Avinash Sodani, Ulf Hanebutte, Senad Durakovic, Chia-Hsin Chen | 2024-10-08 |
| 11256517 | Architecture of crossbar of inference engine | Avinash Sodani, Ulf Hanebutte, Senad Durakovic, Chia-Hsin Chen | 2022-02-22 |
| 11086633 | Single instruction set architecture (ISA) format for multiple ISAS in machine learning inference engine | Avinash Sodani, Ulf Hanebutte, Senad Durakovic, Chia-Hsin Chen | 2021-08-10 |
| 11029963 | Architecture for irregular operations in machine learning inference engine | Avinash Sodani, Ulf Hanebutte, Senad Durakovic, Chia-Hsin Chen, Rishan Tan | 2021-06-08 |
| 10970080 | Systems and methods for programmable hardware architecture for machine learning | Avinash Sodani, Chia-Hsin Chen, Ulf Hanebutte, Senad Durakovic | 2021-04-06 |
| 10896045 | Architecture for dense operations in machine learning inference engine | Avinash Sodani, Ulf Hanebutte, Senad Durakovic, Chia-Hsin Chen | 2021-01-19 |
| 10824433 | Array-based inference engine for machine learning | Avinash Sodani, Ulf Hanebutte, Senad Durakovic, Chia-Hsin Chen | 2020-11-03 |