Issued Patents All Time
Showing 25 most recent of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11488502 | Telescoping flagpole flag clips | Leighton Klevana | 2022-11-01 |
| 10706950 | Testing for memory error correction code logic | Steven Lee Gregor | 2020-07-07 |
| 10706952 | Testing for memories during mission mode self-test | Steven Lee Gregor | 2020-07-07 |
| 10551435 | 2D compression-based low power ATPG | Nitin Parimi, Krishna Vijaya Chakravadhanula, Vivek Chickermane, Brian Foutz | 2020-02-04 |
| 10541043 | On demand data stream controller for programming and executing operations in an integrated circuit | Carl Wisnesky, II, Steven Lee Gregor, Norman Robert Card | 2020-01-21 |
| 10398953 | Travel cover | Leighton Klevana | 2019-09-03 |
| 10213657 | Golf ball retriever | Leighton Klevana | 2019-02-26 |
| 10060976 | Method and apparatus for automatic diagnosis of mis-compares | Sharjinder Singh, Sameer Chakravarthy Chillarige, Robert Jordan Asher, Sonam Kathpalia, Joseph Michael Swenton | 2018-08-28 |
| 9170301 | Hierarchical compaction for test pattern power generation | Krishna Vijaya Chakravadhanula, Rajesh Khurana | 2015-10-27 |
| RE44479 | Method and mechanism for implementing electronic designs having power information specifications background | Qi Wang, Ankur Gupta, Pinhong Chen, Christina Chu, Manish Pandey +6 more | 2013-09-03 |
| 8516422 | Method and mechanism for implementing electronic designs having power information specifications background | Qi Wang, Ankur Gupta, Pinhong Chen, Christina Chu, Manish Pandey +5 more | 2013-08-20 |
| 8397113 | Method and system for identifying power defects using test pattern switching activity | Thomas Bartenstein | 2013-03-12 |
| 8271226 | Testing state retention logic in low power systems | Krishna Vijaya Chakravadhanula, Vivek Chickermane, Steven Lee Gregor, Puneet Arora | 2012-09-18 |
| 8001433 | Scan testing architectures for power-shutoff aware systems | Sandeep Bhatia, Brian Foutz, Vivek Chickermane | 2011-08-16 |
| 7979764 | Distributed test compression for integrated circuits | Brian Foutz, Vivek Chickermane, Carl Barnhart | 2011-07-12 |
| 7926012 | Design-For-testability planner | Nitin Parimi, Brian Foutz, Vivek Chickermane | 2011-04-12 |
| 7779381 | Test generation for low power circuits | Vivek Chickermane, James Sage, Xiaochuan Yuan | 2010-08-17 |
| 7739629 | Method and mechanism for implementing electronic designs having power information specifications background | Qi Wang, Ankur Gupta, Pinhong Chen, Christina Chu, Manish Pandey +5 more | 2010-06-15 |
| 6870087 | Assembly method and apparatus for photovoltaic module | — | 2005-03-22 |
| 6182531 | Containment ring for flywheel failure | Jonathan W. Gabrys | 2001-02-06 |
| 6086696 | Method of forming a seamless, cylindrical, thermoplastic structure with a multiple compaction roller winder | — | 2000-07-11 |
| 5809525 | Multi-level computer cache system providing plural cache controllers associated with memory address ranges and having cache directories | James Wilson Bishop, Charles Embrey Carmack, Jr., Stefan P. Jackowski, Gregory R. Klouda, Robert Siegl | 1998-09-15 |
| 5539895 | Hierarchical computer cache system | James Wilson Bishop, Charles Embrey Carmack, Jr., Stefan P. Jackowski, Gregory R. Klouda, Robert Siegl | 1996-07-23 |
| 5539875 | Error windowing for storage subsystem recovery | James Wilson Bishop, Mark Louis Ciacelli, Stefan P. Jackowski, Gregory R. Klouda, Robert Siegl | 1996-07-23 |
| 5311461 | Programmable priority and selective blocking in a compute system | — | 1994-05-10 |