GH

Graham W. Hills

Applied Materials: 8 patents #1,541 of 7,310Top 25%
AT AT&T: 4 patents #4,399 of 18,772Top 25%
Lam Research: 1 patents #1,364 of 2,128Top 65%
📍 Allentown, PA: #108 of 1,150 inventorsTop 10%
🗺 Pennsylvania: #5,397 of 74,527 inventorsTop 8%
Overall (All Time): #357,023 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
6217786 Mechanism for bow reduction and critical dimension control in etching silicon dioxide using hydrogen-containing additive gases in fluorocarbon gas chemistry Thomas D. Nguyen, Douglas Keil, Keyvan Khajehnouri 2001-04-17
6125788 Plasma reactor with enhanced plasma uniformity by gas addition, reduced chamber diameter and reduced RF wafer pedestal diameter Yuh-Jia Su 2000-10-03
5913148 Reduced size etching method for integrated circuits 1999-06-15
5744049 Plasma reactor with enhanced plasma uniformity by gas addition, and method of using same Yuh-Jia Su 1998-04-28
5685914 Focus ring for semiconductor wafer processing in a plasma reactor Yuh-Jia Su, Yoshiaki Tanase, Robert E. Ryan 1997-11-11
5534108 Method and apparatus for altering magnetic coil current to produce etch uniformity in a magnetic field-enhanced plasma reactor Xue-Yu Qian, Gerald Yin, Robert Steger 1996-07-09
5410122 Use of electrostatic forces to reduce particle contamination in semiconductor plasma processing chambers Yuh-Jia Su, Anand Gupta, Joseph Lanucha 1995-04-25
5382316 Process for simultaneous removal of photoresist and polysilicon/polycide etch residues from an integrated circuit structure Ruth E. Bucknall 1995-01-17
5242538 Reactive ion etch process including hydrogen radicals Matt Hamrah, Ian J. Morey 1993-09-07
5176790 Process for forming a via in an integrated circuit structure by etching through an insulation layer while inhibiting sputtering of underlying metal Paul Arleo, Jon Henri, Jerry Wong, Robert Wu 1993-01-05
5057186 Method of taper-etching with photoresist adhesion layer Hongzong Chew, Catherine Ann Fieber, Edward P. Martin, Jr. 1991-10-15
5026666 Method of making integrated circuits having a planarized dielectric Robert D. Huttemann, Kolawole R. Olasupo 1991-06-25
4980301 Method for reducing mobile ion contamination in semiconductor integrated circuits Alain Harrus, Cris W. Lawrence, Morgan J. Thoma 1990-12-25
4832789 Semiconductor devices having multi-level metal interconnects William T. Cochran, Agustin M. Garcia, Jenn L. Yeh 1989-05-23