WC

William T. Cochran

AT AT&T: 10 patents #1,780 of 18,772Top 10%
AS Agere Systems: 4 patents #355 of 1,849Top 20%
AG Agere Systems Guardian: 2 patents #139 of 810Top 20%
AL American Telephone And Telegraph Company, At&T Bell Laboratories: 1 patents #330 of 1,086Top 35%
Overall (All Time): #279,584 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6893806 Multiple purpose reticle layout for selective printing of test circuits Cheryl Anne Bollinger, Seungmoo Choi, Stephen Arlon Meisner, Daniel Mark Wroge, Gerard Zaneski 2005-05-17
6838769 Dual damascene bond pad structure for lowering stress and allowing circuitry under pads Sailesh Chittipeddi, Yehuda Smooha 2005-01-04
6627963 Method for fabricating a merged integrated circuit device Isik C. Kizilyalli, Morgan J. Thoma 2003-09-30
6556409 Integrated circuit including ESD circuits for a multi-chip module and a method therefor Sailesh Chittipeddi, Yehuda Smooha 2003-04-29
6417087 Process for forming a dual damascene bond pad structure over active circuitry Sailesh Chittipeddi, Yehuda Smooha 2002-07-09
6395611 Inductor or low loss interconnect and a method of manufacturing an inductor or low loss interconnect in an integrated circuit Nathan R. Belk, Michel R. Frei, David C. Goldthorp, Shahriar Moinian, Kwok Ng +2 more 2002-05-28
6214675 Method for fabricating a merged integrated circuit device Isik C. Kizilyalli, Morgan J. Thoma 2001-04-10
6136620 Method of manufacture for an integrated circuit having a BIST circuit and bond pads incorporated therein Sailesh Chittipeddi, Yehuda Smooha 2000-10-24
6017787 Integrated circuit with twin tub Sailesh Chittipeddi, Stephen Knight 2000-01-25
5965903 Device and method of manufacture for an integrated circuit having a BIST circuit and bond pads incorporated therein Sailesh Chittipeddi, Yehuda Smooha 1999-10-12
5963054 High voltage CMOS logic circuit using low voltage transistors Scott W. McLellan 1999-10-05
5773867 Programmable hex-ROM with isolation transistor structure Sailesh Chittipeddi, Kang-Woo Lee 1998-06-30
5751065 Integrated circuit with active devices under bond pads Sailesh Chittipeddi, Yehuda Smooha 1998-05-12
5439847 Integrated circuit fabrication with a raised feature as mask Sailesh Chittipeddi 1995-08-08
5045486 Transistor fabrication method Sailesh Chittipeddi, Michael J. Kelly 1991-09-03
5045898 CMOS integrated circuit having improved isolation Min-Liang Chen, Chung Wai Leung 1991-09-03
4832789 Semiconductor devices having multi-level metal interconnects Agustin M. Garcia, Graham W. Hills, Jenn L. Yeh 1989-05-23