Issued Patents All Time
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7910429 | Method of forming ONO-type sidewall with reduced bird's beak | Zhong Dong, Chuck Jang, Ching-Hwa Chen, Chunchieh Huang, Jin Ho Kim +4 more | 2011-03-22 |
| 7897659 | Water-based moldable modeling dough and method preparing therefor | — | 2011-03-01 |
| 7511333 | Nonvolatile memory cell with multiple floating gates and a connection region in the channel | Yue-Song He, Jin Ho Kim, Kwok Ng | 2009-03-31 |
| 6962848 | Nonvolatile memory structures and fabrication methods | Chia-Shun Hsiao, Vei-Han Chan | 2005-11-08 |
| 6821847 | Nonvolatile memory structures and fabrication methods | Chia-Shun Hsiao, Vei-Han Chan | 2004-11-23 |
| 6815302 | Method of making a bipolar transistor with an oxygen implanted emitter window | Alan S. Chen, Yih-Feng Chyan, Yi Ma, William J. Nagy | 2004-11-09 |
| 6815760 | Nonvolatile memory structures and fabrication methods | Chia-Shun Hsiao, Vei-Han Chan | 2004-11-09 |
| 6700143 | Dummy structures that protect circuit elements during polishing | Hsing Tuan | 2004-03-02 |
| 6657281 | Bipolar transistor with a low K material in emitter base spacer regions | Yih-Feng Chyan, Chunchieh Huang, Yi Ma, Shahriar Moinian | 2003-12-02 |
| 6570215 | Nonvolatile memories with floating gate spacers, and methods of fabrication | Hsing Tuan, Vei-Han Chan, Chia-Shun Hsiao | 2003-05-27 |
| 6566196 | Sidewall protection in fabrication of integrated circuits | Barbara Haselden, Chia-Shun Hsiao, Chunchieh Huang, Jin Ho Kim, Kuei-Chang Tsai | 2003-05-20 |
| 6562681 | Nonvolatile memories with floating gate spacers, and methods of fabrication | Hsing Tuan, Vei-Han Chan, Chia-Shun Hsiao | 2003-05-13 |
| 6559055 | Dummy structures that protect circuit elements during polishing | Hsing Tuan | 2003-05-06 |
| 6555871 | Flash memory device having a bipolar transistor formed integral thereto and a method of manufacture therefor | Yih-Feng Chyan, Ranbir Singh | 2003-04-29 |
| 6537887 | Integrated circuit fabrication | Yih-Feng Chyan, Yi Ma, Demi Nguyen | 2003-03-25 |
| 6451660 | Method of forming bipolar transistors comprising a native oxide layer formed on a substrate by rinsing the substrate in ozonated water | Yi Ma, Yih-Feng Chyan, Jane Qian Liu, Timothy Campbell | 2002-09-17 |
| 6358807 | Bipolar semiconductor device and method of forming same having reduced transient enhanced diffusion | Yih-Feng Chyan | 2002-03-19 |
| 6355524 | Nonvolatile memory structures and fabrication methods | Hsing Tuan, Li-Chun Li, Thomas Chang | 2002-03-12 |
| 6313500 | Split gate memory cell | Patrick J. Kelley, Ranbir Singh | 2001-11-06 |
| 6222764 | Erasable memory device and an associated method for erasing a memory cell therein | Patrick J. Kelley, Ranbir Singh | 2001-04-24 |
| 6191980 | Single-poly non-volatile memory cell having low-capacitance erase gate | Patrick J. Kelley, Ross A. Kohler, Richard J. McPartland, Ranbir Singh | 2001-02-20 |
| 6168995 | Method of fabricating a split gate memory cell | Patrick J. Kelley, Ranbir Singh | 2001-01-02 |
| 5851870 | Method for making a capacitor | Dayo Alugbin, Joseph R. Radosevich, Ranbir Singh, Daniel Mark Wroge | 1998-12-22 |
| 5843827 | Method of reducing dielectric damage from plasma etch charging | Richard W. Gregor | 1998-12-01 |
| 5312781 | Flash EEPROM fabrication process that uses a selective wet chemical etch | Richard W. Gregor | 1994-05-17 |