| 12494237 |
Clock circuitry for memory applications |
Rahul Mathur, Sanjay Mangal, Hemavathi Chaya, Kyoung Tae Kim, Pratik Ghanshambhai Satasia |
2025-12-09 |
|
| 12422992 |
Increased throughput for writes to memory |
Akshay Kumar, Rahul Mathur, Sean James Salisbury, Andrew David Tune, Gaurav Kumar |
2025-09-23 |
|
| 12412623 |
Precharge circuitry for use with bitlines |
Rahul Mathur, Hsin-Yu Chen, Phani Raja Bhushan Chalasani, Kyung-Woo Kim |
2025-09-09 |
|
| 12249400 |
Dynamic way-based variable pipeline architecture for on-chip memory |
— |
2025-03-11 |
|
| 12243622 |
Dynamic power management for on-chip memory |
— |
2025-03-04 |
|
| 12174738 |
Circuitry and method |
Andrew David Tune, Sean James Salisbury |
2024-12-24 |
$46,652,000 |
| 12087353 |
Burst read with flexible burst length for on-chip memory |
Andrew David Tune, Sean James Salisbury, Rahul Mathur, Hsin-Yu Chen, Phani Raja Bhushan Chalasani |
2024-09-10 |
$55,532,000 |
| 12072810 |
System control using sparse data |
Michael R. Seningen, Ben D. Jarrett, Greg M. Hess |
2024-08-27 |
$283,265,000 |
| 12068025 |
Power-up header circuitry for multi-bank memory |
Rahul Mathur, Hsin-Yu Chen |
2024-08-20 |
$30,526,000 |
| 11967360 |
Dynamically adjustable pipeline for memory access |
— |
2024-04-23 |
$50,773,000 |
| 11935580 |
System cache peak power management |
Hsin-Yu Chen |
2024-03-19 |
$53,087,000 |
| 11803480 |
System control using sparse data |
Michael R. Seningen, Ben D. Jarrett, Greg M. Hess |
2023-10-31 |
$267,879,000 |
| 11514979 |
Wordline driver architecture |
Andy Wangkun Chen, Munish Kumar, Ayush Kulshrestha, Rajiv Kumar Sisodia, Yew Keong Chong +1 more |
2022-11-29 |
|
| 11327896 |
System control using sparse data |
Michael R. Seningen, Ben D. Jarrett, Greg M. Hess |
2022-05-10 |
$259,428,000 |
| 10691610 |
System control using sparse data |
Michael R. Seningen, Ben D. Jarrett, Greg M. Hess |
2020-06-23 |
$111,648,000 |
| 10553274 |
Low active power write driver with reduced-power boost circuit |
— |
2020-02-04 |
$97,170,000 |
| 10199090 |
Low active power write driver with reduced-power boost circuit |
— |
2019-02-05 |
$70,781,000 |
| 9584122 |
Integrated circuit power reduction through charge |
— |
2017-02-28 |
$61,357,000 |
| 9443045 |
Power estimation in an integrated circuit design flow |
Jason A. Frerich, Christopher M. Goertz |
2016-09-13 |
$80,175,000 |
| 9412469 |
Weak bit detection using on-die voltage modulation |
Michael R. Seningen, Michael A. Dreesen |
2016-08-09 |
$44,625,000 |
| 8988107 |
Integrated circuit including pulse control logic having shared gating control |
— |
2015-03-24 |
$60,606,000 |
| 8949573 |
Translation lookaside buffer structure including an output comparator |
Chetan C. Kamdar, William V. Miller |
2015-02-03 |
$71,266,000 |
| 8947963 |
Variable pre-charge levels for improved cell stability |
— |
2015-02-03 |
$71,266,000 |
| 8837226 |
Memory including a reduced leakage wordline driver |
Stephen C. Horne, Alexander E. Runas, Daniel C. Chow |
2014-09-16 |
$52,432,000 |
| 8767495 |
Memory having isolation units for isolating storage arrays from a shared I/O during retention mode operation |
Daniel C. Chow, Kenneth W. Jones, Alexander E. Runas |
2014-07-01 |
$75,855,000 |
