Issued Patents All Time
Showing 26–50 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7078299 | Formation of finFET using a sidewall epitaxial layer | Jung-Suk Goo, James Pan, Qi Xiang | 2006-07-18 |
| 7033916 | Shallow junction semiconductor and method for the fabrication thereof | Mario M. Pelella, William G. En, Eric N. Paton | 2006-04-25 |
| 6955969 | Method of growing as a channel region to reduce source/drain junction capacitance | Ihsan Djomehri, Jung-Suk Goo, Srinath Krishnan, James Pan, Qi Xiang | 2005-10-18 |
| 6933579 | Semiconductor solid phase epitaxy damage control method and integrated circuit produced thereby | William G. En, Mario M. Pelella | 2005-08-23 |
| 6873030 | Metal gate electrode using silicidation and method of formation thereof | Zoran Krivokapic | 2005-03-29 |
| 6872644 | Semiconductor device with non-compounded contacts, and method of making | Matthew S. Buynoski | 2005-03-29 |
| 6830987 | Semiconductor device with a silicon-on-void structure and method of making the same | Mario Pelella, Srinath Krishnan, William G. En | 2004-12-14 |
| 6815297 | Ultra-thin fully depleted SOI device and method of fabrication | Zoran Krivokapic | 2004-11-09 |
| 6812550 | Wafer pattern variation of integrated circuit fabrication | William G. En, Eric N. Paton, Mario M. Pelella | 2004-11-02 |
| 6787436 | Silicide-silicon contacts for reduction of MOSFET source-drain resistances | Matthew S. Buynoski | 2004-09-07 |
| 6727149 | Method of making a hybrid SOI device that suppresses floating body effects | Srinath Krishnan, Zoran Krivokapic | 2004-04-27 |
| 6680240 | Silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxide | — | 2004-01-20 |
| 6630720 | Asymmetric semiconductor device having dual work function gate and method of fabrication | Haihong Wang, Qi Xiang | 2003-10-07 |
| 6599831 | Metal gate electrode using silicidation and method of formation thereof | Zoran Krivokapic | 2003-07-29 |
| 6586808 | Semiconductor device having multi-work function gate electrode and multi-segment gate dielectric | Qi Xiang, Haihong Wang | 2003-07-01 |
| 6541821 | SOI device with source/drain extensions and adjacent shallow pockets | Srinath Krishnan, Zoran Krivokapic | 2003-04-01 |
| 6506654 | Source-side stacking fault body-tie for partially-depleted SOI MOSFET hysteresis control | Andy Wei, Mario M. Pelella | 2003-01-14 |
| 6495887 | Argon implantation after silicidation for improved floating-body effects | Srinath Krishnan, Matthew S. Buynoski | 2002-12-17 |
| 6492209 | Selectively thin silicon film for creating fully and partially depleted SOI on same wafer | Srinath Krishnan, Matthew S. Buynoski | 2002-12-10 |
| 6486038 | Method for and device having STI using partial etch trench bottom liner | Ming-Ren Lin, Qi Xiang | 2002-11-26 |
| 6465847 | Semiconductor-on-insulator (SOI) device with hyperabrupt source/drain junctions | Srinath Krishnan | 2002-10-15 |
| 6444534 | SOI semiconductor device opening implantation gettering method | — | 2002-09-03 |
| 6429054 | Method of fabricating semiconductor-on-insulator (SOI) device with hyperabrupt source/drain junctions | Srinath Krishnan | 2002-08-06 |
| 6399452 | Method of fabricating transistors with low thermal budget | Srinath Krishnan | 2002-06-04 |
| 6362063 | Formation of low thermal budget shallow abrupt junctions for semiconductor devices | Srinath Krishnan, Shekhar Pramanick | 2002-03-26 |