Issued Patents All Time
Showing 51–60 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6284608 | Method for making accumulation mode N-channel SOI | Zoran Krivakapic, Srinath Krishnan | 2001-09-04 |
| 6274915 | Method of improving MOS device performance by controlling degree of depletion in the gate electrode | Srinath Krishnan, Ming-Yin Hao, David Bang | 2001-08-14 |
| 6245636 | Method of formation of pseudo-SOI structures with direct contact of transistor body to the substrate | — | 2001-06-12 |
| 6238960 | Fast MOSFET with low-doped source/drain | Srinath Krishnan, Ming-Ren Lin | 2001-05-29 |
| 6204138 | Method for fabricating a MOSFET device structure which facilitates mitigation of junction capacitance and floating body effects | Srinath Krishnan, Ming-Ren Lin | 2001-03-20 |
| 6184112 | Method of forming a MOSFET transistor with a shallow abrupt retrograde dopant profile | Srinath Krishnan, Shekhar Pramanick | 2001-02-06 |
| 6060364 | Fast Mosfet with low-doped source/drain | Srinath Krishnan, Ming-Ren Lin | 2000-05-09 |
| 5965917 | Structure and method of formation of body contacts in SOI MOSFETS to elimate floating body effects | Srinath Krisnan | 1999-10-12 |
| 5250454 | Method for forming thickened source/drain contact regions for field effect transistors | — | 1993-10-05 |
| 5073506 | Method for making a self-aligned lateral bipolar SOI transistor | Anthony Caviglia | 1991-12-17 |