Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Roden R. Topacio — 37 Patents

AMD: 44 patents #179 of 9,280Top 2%
Markham, CA: #18 of 1,673 inventorsTop 2%
Overall (All Time): #88,321 of 4,157,543Top 3%
37 Patents All Time
Roden R. Topacio has been granted 37 US patents while listed as an inventor at AMD. The first was granted in 2010 and the most recent in November 2024. Roden R. Topacio ranks #88,321 of 4,157,543 US inventors in our database (top 2.1%). Patent records list Roden R. Topacio in Markham, ON, CA.

Patents per Year

Patents granted per year, 2010 to 2024Bar chart with a peak of 7 patents in 2014.peak 72010: 2 patents20102011: 6 patents2012: 6 patents20122013: 2 patents2014: 7 patents20142015: 5 patents2016: 1 patents20162017: 2 patents2019: 2 patents20192022: 2 patents2024: 2 patents2024

Issued Patents All Time

Showing 1–25 of 37 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12148715 Electronic device including a substrate, a structure, and an adhesive and a process of forming the same 2024-11-19
11942405 Semiconductor package assembly using a passive device as a standoff Jianguo Li 2024-03-26
11335659 Semiconductor chip with patterned underbump metallization and polymer film Suming Hu, Yip Seng Low 2022-05-17
11315883 Integrated circuit product customizations for identification code visibility Suming Hu, Farshad Ghahghahi, Jianguo Li, Andrew Kwan Wai Leung 2022-04-26 $716,201,000
10431533 Circuit board with constrained solder interconnect pads Andrew KW Leung 2019-10-01
10403589 Interconnect etch with polymer layer edge protection 2019-09-03
9728518 Interconnect etch with polymer layer edge protection 2017-08-08
9576923 Semiconductor chip with patterned underbump metallization and polymer film Suming Hu, Yip Seng Low 2017-02-21
9318457 Methods of fabricating semiconductor chip solder structures Neil McLellan 2016-04-19
9209106 Thermal management circuit board for stacked semiconductor chip device Xiao Ling Shi, Suming Hu, Liane Martinez, Terence Cheung 2015-12-08
9142520 Methods of fabricating semiconductor chip solder structures Neil McLellan 2015-09-22
9059159 Routing layer for mitigating stress in a semiconductor die Gabriel Wong 2015-06-16
9035471 Routing layer for mitigating stress in a semiconductor die Gabriel Wong 2015-05-19
8927344 Die substrate with reinforcement structure Adam Zbrzezny 2015-01-06
8847383 Integrated circuit package strip with stiffener Neil McLellan, Vincent Chan 2014-09-30
8772083 Solder mask with anchor structures Andrew KW Leung, Yu-Ling Hsieh, Yip Seng Low 2014-07-08 $2,496,000
8664777 Routing layer for mitigating stress in a semiconductor die Gabriel Wong 2014-03-04
8647974 Method of fabricating a semiconductor chip with supportive terminal pad Michael Z. Su, Neil McLellan 2014-02-11 $6,027,000
8642463 Routing layer for mitigating stress in a semiconductor die Gabriel Wong 2014-02-04
8637983 Face-to-face (F2F) hybrid structure for an integrated circuit Liane Martinez, Yip Seng Low 2014-01-28
8633599 Semiconductor chip with underfill anchors Neil McLellan 2014-01-21 $3,762,000
8389340 Methods of forming semiconductor chip underfill anchors Neil McLellan 2013-03-05
8378471 Semiconductor chip bump connection apparatus and method Vincent Chan, Fan Yeung 2013-02-19
8313984 Die substrate with reinforcement structure Adam Zbrzezny 2012-11-20
8298945 Method of manufacturing substrates having asymmetric buildup layers Andrew KW Leung, Liane Martinez, Yip Seng Low 2012-10-30