Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12388490 | Receiver equalization circuitry using variable termination and T-coil | Dean E. Gonzales, Milam Paraschou, Mark Chirachanchai, Gerald R. Talbot | 2025-08-12 |
| 12174769 | Periodic receiver clock data recovery with dynamic data edge | Gurunath Dollin, Milam Paraschou, Edward Wade Thoenes, Ryan J. Hensley, Gerald R. Talbot | 2024-12-24 |
| 12034440 | Combination scheme for baseline wander, direct current level shifting, and receiver linear equalization for high speed links | Rajesh Kumar, Gerald R. Talbot, Ethan Crain, Tracy J. Feist, Jeffrey Cooper | 2024-07-09 |
| 11860685 | Clock frequency divider circuit | Luke Whitaker | 2024-01-02 |
| 11805026 | Channel training using a replica lane | Stanley A. Lackey, Jr., Damon Tohidi, Gerald R. Talbot | 2023-10-31 |
| 10749756 | Channel training using a replica lane | Stanley A. Lackey, Jr., Damon Tohidi, Gerald R. Talbot | 2020-08-18 |
| 10692545 | Low power VTT generation mechanism for receiver termination | Milam Paraschou, Balwinder Singh, Gerald R. Talbot, Alushulla Jack Ambundo, Thomas H. Likens, III +1 more | 2020-06-23 |
| 10103837 | Asynchronous feedback training | Stanley A. Lackey, Jr., Damon Tohidi, Gerald R. Talbot | 2018-10-16 |
| 9673849 | Common mode extraction and tracking for data signaling | Milam Paraschou | 2017-06-06 |
| 9639495 | Integrated controller for training memory physical layer interface | Glenn Dearth, Gerry Talbot, Anwar Kashem, Brian Amick | 2017-05-02 |
| 9183125 | DDR receiver enable cycle training | Kevin M. Brandl, Oswin E. Housty, Gerald R. Talbot | 2015-11-10 |
| 8782458 | System and method of data communications between electronic devices | Aaron Nygren, Anwar Kashem, Gerry Talbot | 2014-07-15 |
| 8760946 | Method and apparatus for memory access delay training | Glenn Dearth, Warren Anderson, Anwar Kashem, Richard W. Reeves, Gerald R. Talbot | 2014-06-24 |
| 8553754 | Method and apparatus for using DFE in a system with non-continuous data | Ramon Mangaser, Shefali Walia, Jonathan P. Dowling, Gerald R. Talbot, Sharad N. Vittal | 2013-10-08 |
| 7936201 | Apparatus and method for providing a signal for transmission via a signal line | Hans-Peter Trost, Anthony Sanders, Dirk Scheideler, Georg Braun, Steve Wood +1 more | 2011-05-03 |
| 7782927 | Generating a transmission clock signal and a reception clock signal for a transceiver using an oscillator | Philipp Börker, Bruno Celli-Urbani, Dirk Friebe, David Müller, Volkmar Rebmann +2 more | 2010-08-24 |
| 7733815 | Data sampler including a first stage and a second stage | Karthik Gopalakrishnan, Luca Ravezzi, Sivaraman Chokkalingam, Hamid Partovi | 2010-06-08 |
| 7721130 | Apparatus and method for switching an apparatus to a power saving mode | Hans-Peter Trost, Anthony Sanders, Dirk Scheideler, Georg Braun, Steve Wood +1 more | 2010-05-18 |
| 7620136 | Clock and data recovery circuit having gain control | Anthony Sanders | 2009-11-17 |
| 7532695 | Clock signal extraction device and method for extracting a clock signal from data signal | Anthony Sanders | 2009-05-12 |
| 7420430 | Method and arrangement for generating an output clock signal with an adjustable phase relation from a plurality of input clock signals | Claudio Andreotti, Anthony Sanders | 2008-09-02 |
| 7405591 | Concept for interfacing a first circuit requiring a first supply voltage and a second supply circuit requiring a second supply voltage | Georg Braun, Dirk Scheideler, Steve Wood, Richard Luyken, Hans-Peter Trost +1 more | 2008-07-29 |
| 7313211 | Method and apparatus for phase detection | Peter Gregorius, Paul Wallner | 2007-12-25 |
| 6836162 | Method and arrangement for frequency doubling | David Müller | 2004-12-28 |