| 12505014 |
DRAM ECC circuit error detection integrity |
Eric W. Scott |
2025-12-23 |
|
| 12394467 |
Read clock start and stop for synchronous memories |
Karthik Gopalakrishnan, Tsun Ho Liu |
2025-08-19 |
|
| 12315551 |
Read clock start and stop for synchronous memories |
Karthik Gopalakrishnan, Tsun Ho Liu |
2025-05-27 |
|
| 12300346 |
High-bandwidth memory module architecture |
— |
2025-05-13 |
|
| 12243578 |
Read clock start and stop for synchronous memories |
Karthik Gopalakrishnan, Tsun Ho Liu |
2025-03-04 |
|
| 12002541 |
Read clock toggle at configurable PAM levels |
Michael John Litt, Karthik Gopalakrishnan, Tsun Ho Liu |
2024-06-04 |
$434,450,000 |
| 11854602 |
Read clock start and stop for synchronous memories |
Karthik Gopalakrishnan, Tsun Ho Liu |
2023-12-26 |
$301,983,000 |
| 10482043 |
Nondeterministic memory access requests to non-volatile memory |
Michael Ignatowski, David A. Roberts |
2019-11-19 |
$41,143,000 |
| 9798353 |
Command protocol for adjustment of write timing delay |
Ming-Ju Edward Lee, Shadi M. Barakat, Xiaoling Xu, Toan Duc Pham, W. Fritz Kruger +1 more |
2017-10-24 |
$9,961,000 |
| 9508408 |
Adjustment of write timing in a memory device |
Ming-Ju Edward Lee, Shadi M. Barakat, Warren Fritz Kruger, Xiaoling Xu, Toan Duc Pham |
2016-11-29 |
$4,439,000 |
| 8909840 |
Data bus inversion coding |
Anwar Kashem, Bryan Black, James M. O'Connor, Warren Fritz Kruger |
2014-12-09 |
$981,000 |
| 8909998 |
Phase shift adjusting method and circuit |
Otto Schumacher, Martin Maier, Thomas Hein |
2014-12-09 |
|
| 8862966 |
Adjustment of write timing based on error detection techniques |
Ming-Ju Edward Lee, Shadi M. Barakat, Xiaoling Xu, Toan Duc Pham, Warren Fritz Kruger |
2014-10-14 |
$1,406,000 |
| 8782458 |
System and method of data communications between electronic devices |
Anwar Kashem, Edoardo Prete, Gerry Talbot |
2014-07-15 |
$3,357,000 |
| 8730758 |
Adjustment of write timing in a memory device |
Ming-Ju Edward Lee, Shadi M. Barakat, Warren Fritz Kruger, Xiaoling Xu, Toan Duc Pham |
2014-05-20 |
$2,934,000 |
| 8726139 |
Unified data masking, data poisoning, and data bus inversion signaling |
James M. O'Connor, Anwar Kashem, Warren Fritz Kruger, Bryan Black |
2014-05-13 |
$1,755,000 |
| 8671304 |
Adjustment of write timing based on a training signal |
Ming-Ju Edward Lee, Shadi M. Barakat, Xiaoling Xu, Toan Duc Pham, Warren Fritz Kruger |
2014-03-11 |
$3,598,000 |
| 8489912 |
Command protocol for adjustment of write timing delay |
Ming-Ju Edward Lee, Shadi M. Barakat, Xiaoling Xu, Toan Duc Pham, Warren Fritz Kruger +1 more |
2013-07-16 |
|
| 8443225 |
Method and apparatus synchronizing integrated circuit clocks |
Ming-Ju Edward Lee, Shadi M. Barakat, Xiaoling Xu, Toan Duc Pham, Warren Fritz Kruger +1 more |
2013-05-14 |
$3,052,000 |
| 8245073 |
Method and apparatus synchronizing integrated circuit clocks |
Ming-Ju Edward Lee, Shadi M. Barakat, Xiaoling Xu, Toan Duc Pham, Warren Fritz Kruger +1 more |
2012-08-14 |
$3,542,000 |
| 8201071 |
Information transmission and reception |
Thomas Hein, Rex Kho |
2012-06-12 |
|
| 8161344 |
Circuits and methods for error coding data blocks |
— |
2012-04-17 |
|
| 7844888 |
Electronic device, method for operating an electronic device, memory circuit and method of operating a memory circuit |
Thomas Hein |
2010-11-30 |
|
| 7836386 |
Phase shift adjusting method and circuit |
Otto Schumacher, Martin Maier, Thomas Hein |
2010-11-16 |
|
| 7802166 |
Memory controller, memory circuit and memory system with a memory controller and a memory circuit |
Thomas Hein, Martin Maier, Otto Schumacher |
2010-09-21 |
|
