GB

Georg Braun

Infineon Technologies Ag: 46 patents #75 of 7,486Top 2%
QA Qimonda Ag: 11 patents #19 of 575Top 4%
SA Siemens Aktiengesellschaft: 2 patents #6,658 of 22,248Top 30%
Overall (All Time): #40,737 of 4,157,543Top 1%
59
Patents All Time

Issued Patents All Time

Showing 25 most recent of 59 patents

Patent #TitleCo-InventorsDate
8161219 Distributed command and address bus architecture for a memory module having portions of bus lines separately disposed Michael Bruennert, Peter Gregorius, Andreas Gartner, Hermann Ruckerbauer, George Alexander +1 more 2012-04-17
8041865 Bus termination system and method Michael Bruennert, Peter Gregorius, Andreas Gaertner, Hermann Ruckerbauer, George Alexander +1 more 2011-10-18
7936201 Apparatus and method for providing a signal for transmission via a signal line Edoardo Prete, Hans-Peter Trost, Anthony Sanders, Dirk Scheideler, Steve Wood +1 more 2011-05-03
7848153 High speed memory architecture Michael Bruennert, Peter Gregorius, Andreas Gaertner, Hermann Ruckerbauer, George Alexander +1 more 2010-12-07
7844798 Command protocol for integrated circuits Andreas Gartner, Maurizio Skerlj, Johannes Stecker 2010-11-30
7796446 Memory dies for flexible use and method for configuring memory dies Hermann Ruckerbauer, Michael Bruennert, Ullrich Menczigar, Christian Mueller, Sitt Tontisirin +1 more 2010-09-14
7771206 Horizontal dual in-line memory modules Michael Bruennert, Peter Gregorius, Andreas Gartner, Hermann Ruckerbauer, George Alexander +1 more 2010-08-10
7721130 Apparatus and method for switching an apparatus to a power saving mode Edoardo Prete, Hans-Peter Trost, Anthony Sanders, Dirk Scheideler, Steve Wood +1 more 2010-05-18
7646650 Buffer component for a memory module, and a memory module and a memory system having such buffer component Srdjan Djordjevic, Andreas Jakobs 2010-01-12
7532523 Memory chip with settable termination resistance circuit Christian Weis, Eckehard Plaettner 2009-05-12
7457174 Semiconductor memory and method for adapting the phase relationship between a clock signal and strobe signal during the acceptance of write data to be transmitted Eckehard Plaettner, Christian Weis, Andreas Jakobs 2008-11-25
7447805 Buffer chip and method for controlling one or more memory arrangements Hermann Ruckerbauer 2008-11-04
7440349 Integrated semiconductor memory with determination of a chip temperature Aaron Nygren 2008-10-21
7405591 Concept for interfacing a first circuit requiring a first supply voltage and a second supply circuit requiring a second supply voltage Dirk Scheideler, Steve Wood, Richard Luyken, Edoardo Prete, Hans-Peter Trost +1 more 2008-07-29
7397684 Semiconductor memory array with serial control/address bus Hermann Ruckerbauer, Ralf-Rainer Schledz, Johannes Stecker, Dominique Savignac 2008-07-08
7376802 Memory arrangement Hermann Ruckerbauer, Maksim Kuzmenka, Siva RaghuRam 2008-05-20
7362622 System for determining a reference level and evaluating a signal on the basis of the reference level Maksim Kuzmenka, Hermann Ruckerbauer 2008-04-22
7342815 DQS signaling in DDR-III memory systems without preamble Hermann Ruckerbauer, Amir H. Motamedi 2008-03-11
7275189 Memory module and method for operating a memory module in a data memory system Hermann Ruckerbauer 2007-09-25
7272063 Memory with a temperature sensor, dynamic memory and memory with a clock unit and method of sensing a temperature of a memory Jens Egerer 2007-09-18
7149864 Method and circuit for allocating memory arrangement addresses Andreas Jakobs 2006-12-12
7139290 Transmitting data into a memory cell array 2006-11-21
7127553 Method for determining the optimum access strategy Alexander Benedix, Bernd Klehn 2006-10-24
6958613 Method for calibrating semiconductor devices using a common calibration reference and a calibration circuit Hermann Ruckerbauer, Simon Muff 2005-10-25
6911732 Integrated circuit Simon Muff, Martin Gall, Andre Schaefer 2005-06-28