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Wiring configuration of a bus system and power wires in a memory chip |
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Wiring configuration of a bus system and power wires in a memory chip |
Maksim Kuzmenka, Kai Schiller |
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Memory system with extended memory density capability |
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2012-09-18 |
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Method and apparatus for determining a skew |
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2012-03-27 |
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Multi-die memory, apparatus and multi-die memory stack |
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2012-02-21 |
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Memory circuit |
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2011-09-06 |
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Apparatus and method for providing a signal for transmission via a signal line |
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2011-05-03 |
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Integrated circuit with wireless connection |
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2011-04-19 |
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Method and apparatus for storage device with a logic unit and method for manufacturing same |
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2011-04-05 |
| 7902876 |
Method and device for generating a digital data signal and use thereof |
Otto Schumacher, Karthik Gopalakrishnan |
2011-03-08 |
| 7782927 |
Generating a transmission clock signal and a reception clock signal for a transceiver using an oscillator |
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2010-08-24 |
| 7721130 |
Apparatus and method for switching an apparatus to a power saving mode |
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2010-05-18 |
| 7405591 |
Concept for interfacing a first circuit requiring a first supply voltage and a second supply circuit requiring a second supply voltage |
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2008-07-29 |
| 7215163 |
Method and device for frequency division and demultiplexing |
Philipp Börker |
2007-05-08 |
| 7084711 |
Method and apparatus for scanning a data signal based on a direction of phase difference |
Philipp Börker |
2006-08-01 |
| 5856762 |
Phase-locked loop with course providing damping and natural frequency independence |
Heinz Werker, Thomas Eichler |
1999-01-05 |
