Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10198389 | Baseboard interconnection device, system and method | Nikhil Jayakumar, Bhagavathi R. Mula, Vivek Trivedi, Vasant K. Palisetti, Daman Ahluwalia | 2019-02-05 |
| 9443053 | System for and method of placing clock stations using variable drive-strength clock drivers built out of a smaller subset of base cells for hybrid tree-mesh clock distribution networks | Nikhil Jayakumar, Vivek Trivedi, Vasant K. Palisetti, Bhagavati R. Mula, Daman Ahluwalia | 2016-09-13 |
| 9390209 | System for and method of combining CMOS inverters of multiple drive strengths to create tune-able clock inverters of variable drive strengths in hybrid tree-mesh clock distribution networks | Nikhil Jayakumar, Vivek Trivedi, Vasant K. Palisetti, Bhagavati R. Mula, Daman Ahluwalia | 2016-07-12 |
| 9305129 | System for and method of tuning clock networks constructed using variable drive-strength clock inverters with variable drive-strength clock drivers built out of a smaller subset of base cells | Nikhil Jayakumar, Vivek Trivedi, Vasant K. Palisetti, Bhagavati R. Mula, Daman Ahluwalia | 2016-04-05 |
| 7342815 | DQS signaling in DDR-III memory systems without preamble | Hermann Ruckerbauer, Georg Braun | 2008-03-11 |
| 7293250 | Method of modeling physical layout of an electronic component in channel simulation | — | 2007-11-06 |