Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10198389 | Baseboard interconnection device, system and method | Amir H. Motamedi, Nikhil Jayakumar, Bhagavathi R. Mula, Vivek Trivedi, Vasant K. Palisetti | 2019-02-05 |
| 9792400 | Determination of flip-flop count in physical design | Chirinjeev Singh, Nikhil Jayakumar, Weihuang Wang, Weinan Ma | 2017-10-17 |
| 9600620 | Repeater insertions providing reduced routing perturbation caused by flip-flop insertions | Nikhil Jayakumar | 2017-03-21 |
| 9600614 | Automated flip-flop insertions in physical design without perturbation of routing | Nikhil Jayakumar, Weihuang Wang, Weinan Ma, Chirinjeev Singh | 2017-03-21 |
| 9443053 | System for and method of placing clock stations using variable drive-strength clock drivers built out of a smaller subset of base cells for hybrid tree-mesh clock distribution networks | Nikhil Jayakumar, Vivek Trivedi, Vasant K. Palisetti, Bhagavati R. Mula, Amir H. Motamedi | 2016-09-13 |
| 9390209 | System for and method of combining CMOS inverters of multiple drive strengths to create tune-able clock inverters of variable drive strengths in hybrid tree-mesh clock distribution networks | Nikhil Jayakumar, Vivek Trivedi, Vasant K. Palisetti, Bhagavati R. Mula, Amir H. Motamedi | 2016-07-12 |
| 9305129 | System for and method of tuning clock networks constructed using variable drive-strength clock inverters with variable drive-strength clock drivers built out of a smaller subset of base cells | Nikhil Jayakumar, Vivek Trivedi, Vasant K. Palisetti, Bhagavati R. Mula, Amir H. Motamedi | 2016-04-05 |