| 12034440 |
Combination scheme for baseline wander, direct current level shifting, and receiver linear equalization for high speed links |
Rajesh Kumar, Edoardo Prete, Gerald R. Talbot, Tracy J. Feist, Jeffrey Cooper |
2024-07-09 |
| 10396803 |
Clock and data recovery of sub-rate data |
Scott E. Meninger, Mark Spaeth |
2019-08-27 |
| 10312920 |
Baseline wander compensation |
Lu Wang |
2019-06-04 |
| 9590797 |
Edge rate control calibration |
Jonathan K. Brown |
2017-03-07 |
| 9490968 |
CDR voter with improved frequency offset tolerance |
— |
2016-11-08 |
| 8634509 |
Synchronized clock phase interpolator |
Thomas F. Hummel, Thucydides Xanthopoulos, Scott E. Meninger |
2014-01-21 |
| 6813209 |
Current integrating sense amplifier for memory modules in RFID |
Karl Rapp, Etan Shacham |
2004-11-02 |
| 6781460 |
Low power low voltage differential signal receiver with improved skew and jitter performance |
Pravas Pradhan |
2004-08-24 |
