Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Oswin E. Housty — 14 Patents

AMD: 13 patents #956 of 9,280Top 15%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
Austin, TX: #2,366 of 18,064 inventorsTop 15%
Texas: #10,699 of 125,132 inventorsTop 9%
Overall (All Time): #332,869 of 4,157,543Top 9%
14 Patents All Time
Oswin E. Housty has been granted 14 US patents while listed as an inventor at AMD. The first was granted in 2007 and the most recent in June 2023. Oswin E. Housty ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Oswin E. Housty in Austin, TX, US.

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11682445 Memory context restore, reduction of boot time of a system on a chip by reducing double data rate memory training Kevin M. Brandl, Naveen Davanam 2023-06-20 $613,276,000
11176986 Memory context restore, reduction of boot time of a system on a chip by reducing double data rate memory training Kevin M. Brandl, Naveen Davanam 2021-11-16 $535,274,000
10311236 Secure system memory training Kathirkamanathan Nadarajah, Sergey Blotsky, Tan Peng, Hary Devapriyan Mahesan 2019-06-04 $35,371,000
9214199 DDR 2D Vref training Kevin M. Brandl, Gerald R. Talbot 2015-12-15 $1,367,000
9183125 DDR receiver enable cycle training Kevin M. Brandl, Edoardo Prete, Gerald R. Talbot 2015-11-10 $918,000
8850155 DDR 2D Vref training Kevin M. Brandl, Gerald R. Talbot 2014-09-30 $1,660,000
8566570 Distributed multi-core memory initialization 2013-10-22 $1,818,000
8392640 Pre-memory resource contention resolution 2013-03-05 $2,179,000
8307198 Distributed multi-core memory initialization 2012-11-06 $1,379,000
8176303 Multiprocessor communication device and methods thereof Bernucho S Krishna 2012-05-08 $5,720,000
8055939 Memory control device and methods thereof David M. Lynch, Andelon Xuan Tra 2011-11-08 $4,445,000
7971098 Bootstrap device and methods thereof Andelon Xuan Tra, David M. Lynch 2011-06-28 $11,920,000
7924637 Method for training dynamic random access memory (DRAM) controller timing delays Shawn Searles, Tahsin Askar, Thomas H. Hamilton 2011-04-12 $5,867,000
7251744 Memory check architecture and method for a multiprocessor computer system 2007-07-31 $9,995,000