Issued Patents All Time
Showing 26–46 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5976956 | Method of controlling dopant concentrations using transient-enhanced diffusion prior to gate formation in a device | Mark I. Gardner, Derick J. Wristers, Robert Dawson, H. Jim Fulford, Frederick N. Hause +1 more | 1999-11-02 |
| 5962894 | Trench transistor with metal spacers | Mark I. Gardner, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Mark W. Michael +1 more | 1999-10-05 |
| 5937299 | Method for forming an IGFET with silicide source/drain contacts in close proximity to a gate with sloped sidewalls | Mark W. Michael, Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause +1 more | 1999-08-10 |
| 5930642 | Transistor with buried insulative layer beneath the channel region | Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1999-07-27 |
| 5930634 | Method of making an IGFET with a multilevel gate | Frederick N. Hause, Robert Dawson, H. Jim Fulford, Mark I. Gardner, Mark W. Michael +1 more | 1999-07-27 |
| 5918126 | Method of fabricating an integrated circuit having devices arranged with different device densities using a bias differential to form devices with a uniform size | H. Jim Fulford, Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1999-06-29 |
| 5918129 | Method of channel doping using diffusion from implanted polysilicon | H. Jim Fulford, Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1999-06-29 |
| 5899732 | Method of implanting silicon through a polysilicon gate for punchthrough control of a semiconductor device | Mark I. Gardner, Derick J. Wristers, Robert Dawson, H. Jim Fulford, Frederick N. Hause +1 more | 1999-05-04 |
| 5888675 | Reticle that compensates for radiation-induced lens error in a photolithographic system | Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1999-03-30 |
| 5885887 | Method of making an igfet with selectively doped multilevel polysilicon gate | Frederick N. Hause, Robert Dawson, H. Jim Fulford Jr., Mark I. Gardner, Mark W. Michael +1 more | 1999-03-23 |
| 5885877 | Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric | Mark I. Gardner, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Daniel Kadosh +2 more | 1999-03-23 |
| 5877058 | Method of forming an insulated-gate field-effect transistor with metal spacers | Mark I. Gardner, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Mark W. Michael +1 more | 1999-03-02 |
| 5851891 | IGFET method of forming with silicide contact on ultra-thin gate | Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1998-12-22 |
| 5840451 | Individually controllable radiation sources for providing an image pattern in a photolithographic system | Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1998-11-24 |
| 5837557 | Semiconductor fabrication method of forming a master layer to combine individually printed blocks of a circuit pattern | H. Jim Fulford, Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1998-11-17 |
| 5827761 | Method of making NMOS and devices with sequentially formed gates having different gate lengths | H. Jim Fulford, Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1998-10-27 |
| 5801075 | Method of forming trench transistor with metal spacers | Mark I. Gardner, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Mark W. Michael +1 more | 1998-09-01 |
| 5723238 | Inspection of lens error associated with lens heating in a photolithographic system | Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 1998-03-03 |
| 5710054 | Method of forming a shallow junction by diffusion from a silicon-based spacer | Mark I. Gardner, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Mark W. Michael +1 more | 1998-01-20 |
| 5427963 | Method of making a MOS device with drain side channel implant | Robert B. Richart, Shyam Garg | 1995-06-27 |
| 5384272 | Method for manufacturing a non-volatile, virtual ground memory element | Effiong Ibok | 1995-01-24 |