Issued Patents All Time
Showing 26–50 of 100 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9331062 | Integrated circuits with backside power delivery | Christopher F. Lane | 2016-05-03 |
| 9330823 | Integrated circuit structure with inductor in silicon interposer | Zhaoyin D. Wu, Namhoon Kim | 2016-05-03 |
| 9136842 | Integrated circuit device with embedded programmable logic | Bernhard Friebe | 2015-09-15 |
| 9129935 | Multi-chip packages with reduced power distribution network noise | Karthik Chandrasekar, Jeffrey Tyhach | 2015-09-08 |
| 9059696 | Interposer with programmable power gating granularity | — | 2015-06-16 |
| 8987868 | Method and apparatus for programmable heterogeneous integration of stacked semiconductor die | — | 2015-03-24 |
| 8941233 | Integrated circuit package with inter-die thermal spreader layers | Tony Ngai | 2015-01-27 |
| 8933345 | Method and apparatus for monitoring through-silicon vias | — | 2015-01-13 |
| 8933447 | Method and apparatus for programmable device testing in stacked die applications | Ramakrishna K. Tanikella, Trevor J. Bauer, Brian C. Gaide, Steven P. Young | 2015-01-13 |
| 8901961 | Placement, rebuffering and routing structure for PLD interface | Tony Ngai, Curt Wortman | 2014-12-02 |
| 8886481 | Reducing variation in multi-die integrated circuits | Michael J. Hart, Venkatesan Murali | 2014-11-11 |
| 8866304 | Integrated circuit device with stitched interposer | Wai-Bor Leung | 2014-10-21 |
| 8802454 | Methods of manufacturing a semiconductor structure | Henley Liu, Cheang-Whang Chang, Myongseob Kim, Dong Wook Kim | 2014-08-12 |
| 8791573 | Skewed partial column input/output floorplan | Hui Liu, Christopher F. Lane, Jianming Huang | 2014-07-29 |
| 8779553 | Stress-aware design for integrated circuits comprising a stress inducing structure and keep out zone | — | 2014-07-15 |
| 8648615 | Testing die-to-die bonding and rework | — | 2014-02-11 |
| 8560982 | Integrated circuit design using through silicon vias | — | 2013-10-15 |
| 8546191 | Disposing underfill in an integrated circuit structure | — | 2013-10-01 |
| 8415783 | Apparatus and methodology for testing stacked die | Raghunandan Chaware | 2013-04-09 |
| 8384225 | Through silicon via with improved reliability | Bahareh Banijamali | 2013-02-26 |
| 8356138 | Methods for implementing programmable memory controller for distributed DRAM system-in-package (SiP) | Chidamber R. Kulkarni | 2013-01-15 |
| 8332803 | Method and apparatus for integrated circuit package thermo-mechanical reliability analysis | — | 2012-12-11 |
| 8299590 | Semiconductor assembly having reduced thermal spreading resistance and methods of making same | — | 2012-10-30 |
| 8296689 | Customizing metal pattern density in die-stacking applications | Hong-Tsz Pan | 2012-10-23 |
| 8237274 | Integrated circuit package with redundant micro-bumps | — | 2012-08-07 |