Issued Patents All Time
Showing 26–50 of 58 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6762597 | Structure, system, and method for assessing electromigration permeability of layer material within interconnect | Christine Hau-Riege, Stefan Hau-Riege | 2004-07-13 |
| 6727592 | Copper interconnect with improved barrier layer | Christy Mei-Chu Woo, John Sanchez, Darrell M. Erb | 2004-04-27 |
| 6725433 | Method for assessing the reliability of interconnects | Christine Hau-Riege | 2004-04-20 |
| 6717266 | Use of an alloying element to form a stable oxide layer on the surface of metal features | Darrell M. Erb | 2004-04-06 |
| 6714037 | Methodology for an assessment of the degree of barrier permeability at via bottom during electromigration using dissimilar barrier thickness | Christine Hau-Riege | 2004-03-30 |
| 6710452 | Coherent diffusion barriers for integrated circuit interconnects | Pin-Chin Connie Wang, Matthew S. Buynoski, Suzette K. Pangrle | 2004-03-23 |
| 6706630 | Method for forming an alloyed metal conductive element of an integrated circuit | — | 2004-03-16 |
| 6649511 | Method of manufacturing a seed layer with annealed region for integrated circuit interconnects | Krishnashree Achuthan | 2003-11-18 |
| 6649034 | Electro-chemical metal alloying for semiconductor manufacturing | Minh Quoc Tran, Pin-Chin Connie Wang | 2003-11-18 |
| 6621290 | Characterization of barrier layers in integrated circuit interconnects | Pin-Chin Connie Wang | 2003-09-16 |
| 6599827 | Methods of forming capped copper interconnects with improved electromigration resistance | Minh Van Ngo, Steven C. Avanzino, Hartmut Ruelke | 2003-07-29 |
| 6599835 | Testing dielectric and barrier layers for integrated circuit interconnects | Christy Mei-Chu Woo | 2003-07-29 |
| 6590288 | Selective deposition in integrated circuit interconnects | Christy Mei-Chu Woo, Pin-Chin Connie Wang | 2003-07-08 |
| 6531780 | Via formation in integrated circuit interconnects | Christy Mei-Chu Woo, Pin-Chin Connie Wang | 2003-03-11 |
| 6531777 | Barrier metal integrity testing using a dual level line to line leakage testing pattern and partial CMP | Christy Mei-Chu Woo | 2003-03-11 |
| 6518185 | Integration scheme for non-feature-size dependent cu-alloy introduction | Pin-Chin Connie Wang, Fei Wang, Kashmir Sahota, Steven C. Avanzino, Matthew S. Buynoski +2 more | 2003-02-11 |
| 6506677 | Method of forming capped copper interconnects with reduced hillock formation and improved electromigration resistance | Steven C. Avanzino, Minh Van Ngo, Hartmut Ruelke | 2003-01-14 |
| 6498397 | Seed layer with annealed region for integrated circuit interconnects | Krishnashree Achuthan | 2002-12-24 |
| 6498384 | Structure and method of semiconductor via testing | — | 2002-12-24 |
| 6476498 | Elimination of flux divergence in integrated circuit interconnects | — | 2002-11-05 |
| 6472757 | Conductor reservoir volume for integrated circuit interconnects | Pin-Chin Connie Wang, Christy Mei-Chu Woo | 2002-10-29 |
| 6462416 | Gradated barrier layer in integrated circuit interconnects | Pin-Chin Connie Wang, Christy Mei-Chu Woo | 2002-10-08 |
| 6462417 | Coherent alloy diffusion barrier for integrated circuit interconnects | Pin-Chin Connie Wang, Minh Van Ngo, Suzette K. Pangrle | 2002-10-08 |
| 6455938 | Integrated circuit interconnect shunt layer | Pin-Chin Connie Wang, Christy Mei-Chu Woo | 2002-09-24 |
| 6445070 | Coherent carbide diffusion barrier for integrated circuit interconnects | Pin-Chin Connie Wang, Minh Van Ngo, Suzette K. Prangrle | 2002-09-03 |