Issued Patents 2023
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11855223 | Self-aligned gate endcap (SAGE) architectures with gate-all-around devices | William Hsu, Leonard P. GULER, Dax M. Crum, Tahir Ghani | 2023-12-26 |
| 11837641 | Gate-all-around integrated circuit structures having adjacent deep via substrate contacts for sub-fin electrical contact | William Hsu, Chung-Hsun Lin, Kinyip Phoa, Oleg Golonzka, Tahir Ghani +5 more | 2023-12-05 |
| 11824116 | Gate-all-around integrated circuit structures having devices with channel-to-substrate electrical contact | William Hsu, Chung-Hsun Lin, Kinyip Phoa, Oleg Golonzka, Ayan Kar +5 more | 2023-11-21 |
| 11824107 | Wrap-around contact structures for semiconductor nanowires and nanoribbons | Rishabh Mehandru, Tahir Ghani, Stephen M. Cea | 2023-11-21 |
| 11804523 | High aspect ratio source or drain structures with abrupt dopant profile | Ryan Keech, Anand S. Murthy, Nicholas G. Minutillo, Suresh Vishwanath, Mohammad HASAN +1 more | 2023-10-31 |
| 11799037 | Gate-all-around integrated circuit structures having asymmetric source and drain contact structures | Mauro J. Kobrinsky, Tahir Ghani | 2023-10-24 |
| 11799009 | Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contact | William Hsu, Chung-Hsun Lin, Kinyip Phoa, Oleg Golonzka, Tahir Ghani | 2023-10-24 |
| 11769836 | Gate-all-around integrated circuit structures having nanowires with tight vertical spacing | Glenn A. Glass, Anand S. Murthy, Tahir Ghani, Susmita Ghose, Zachary Geiger | 2023-09-26 |
| 11757037 | Epitaxial oxide plug for strained transistors | Karthik Jambunathan, Anupama Bowonder, Anand S. Murthy, Tahir Ghani | 2023-09-12 |
| 11749733 | FIN shaping using templates and integrated circuit structures resulting therefrom | Leonard P. GULER, Mark Armstrong, William Hsu, Tahir Ghani, Swaminathan Sivakumar | 2023-09-05 |
| 11742410 | Gate-all-around integrated circuit structures having oxide sub-fins | Leonard P. GULER, Tahir Ghani, Swaminathan Sivakumar | 2023-08-29 |
| 11715787 | Self-aligned nanowire | Mark Armstrong, Jun Sung Kang, Bruce Beattie, Tahir Ghani | 2023-08-01 |
| 11715775 | Self-aligned gate endcap (SAGE) architectures with gate-all-around devices having epitaxial source or drain structures | Leonard P. GULER, Tahir Ghani, Swaminathan Sivakumar | 2023-08-01 |
| 11705518 | Isolation schemes for gate-all-around transistor devices | Rishabh Mehandru, Stephen M. Cea, Tahir Ghani, William Hsu | 2023-07-18 |
| 11676965 | Strained tunable nanowire structures and process | Stephen M. Cea, Tahir Ghani, Anand S. Murthy | 2023-06-13 |
| 11621354 | Integrated circuit structures having partitioned source or drain contact structures | Mauro J. Kobrinsky, Stephanie A. Bojarski, Babita Dhayal, Tahir Ghani | 2023-04-04 |
| 11594637 | Gate-all-around integrated circuit structures having fin stack isolation | Leonard P. GULER, Stephen D. Snyder, William Hsu, Urusa Alaan, Tahir Ghani +4 more | 2023-02-28 |
| 11588052 | Sub-Fin isolation schemes for gate-all-around transistor devices | William Hsu, Tahir Ghani | 2023-02-21 |
| 11581315 | Self-aligned gate edge trigate and finFET devices | Szuya S. Liao, Tahir Ghani, Christopher KENYON, Leonard P. GULER | 2023-02-14 |
| 11569370 | DEPOP using cyclic selective spacer etch | Leonard P. GULER, Vivek Thirtha, Shu Zhou, Nitesh Kumar, William Hsu +4 more | 2023-01-31 |