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Gate aligned contact and method to fabricate same |
Oleg Golonzka, Charles H. Wallace, Tahir Ghani |
2023-09-12 |
| 11749733 |
FIN shaping using templates and integrated circuit structures resulting therefrom |
Leonard P. GULER, Biswajeet Guha, Mark Armstrong, William Hsu, Tahir Ghani |
2023-09-05 |
| 11742410 |
Gate-all-around integrated circuit structures having oxide sub-fins |
Leonard P. GULER, Biswajeet Guha, Tahir Ghani |
2023-08-29 |
| 11721580 |
1D vertical edge blocking (VEB) via and plug |
Leonard P. GULER, Michael K. Harper, Suzanne S. Rich, Charles H. Wallace, Curtis W. Ward +4 more |
2023-08-08 |
| 11715775 |
Self-aligned gate endcap (SAGE) architectures with gate-all-around devices having epitaxial source or drain structures |
Leonard P. GULER, Biswajeet Guha, Tahir Ghani |
2023-08-01 |
| 11652060 |
Die interconnection scheme for providing a high yielding process for high performance microprocessors |
Wilfred Gomes, Mark Bohr, Rajabali M. Koduri, Leonard NEIBERG, Altug Koker |
2023-05-16 |