Issued Patents 2022
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11532524 | Integrated circuit test method and structure thereof | Hsien-Wei Chen | 2022-12-20 |
| 11456257 | Semiconductor package with dual sides of metal routing | Shin-Puu Jeng, Shuo-Mao Chen, Po-Yao Chuang, Feng-Cheng Hsu, Po-Yao Lin | 2022-09-27 |
| 11430739 | Structure and formation method of package structure with fan-out structure | Po-Hao Tsai, Shin-Puu Jeng, Meng-Liang Lin, Shih-Yung PENG, Shih-Ting Hung | 2022-08-30 |
| 11342306 | Multi-chip wafer level packages | Shuo-Mao Chen, Feng-Cheng Hsu, Han-Hsiang Huang, Shin-Puu Jeng, Hsiao-Wen Lee | 2022-05-24 |
| 11329031 | Structure and formation method for chip package | Jui-Pin Hung, Cheng-Lin Huang, Shin-Puu Jeng | 2022-05-10 |