Issued Patents 2022
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11515431 | Enabling residue free gap fill between nanosheets | Indira Seshadri, Ekmini Anuja De Silva, Jing Guo, Muthumanickam Sankarapandian, Nelson Felix | 2022-11-29 |
| 11476418 | Phase change memory cell with a projection liner | Injo Ok, Andrew H. Simon, Kevin W. Brew, Nicole Saulnier, Iqbal Rashid Saraf +1 more | 2022-10-18 |
| 11456415 | Phase change memory cell with a wrap around and ring type of electrode contact and a projection liner | Injo Ok, Andrew H. Simon, Kevin W. Brew, Nicole Saulnier, Iqbal Rashid Saraf +2 more | 2022-09-27 |
| 11456219 | Gate-all-around FETs having uniform threshold voltage | Dechao Guo, Junli Wang, Heng Wu | 2022-09-27 |
| 11393725 | Multi-metal dipole doping to offer multi-threshold voltage pairs without channel doping for highly scaling CMOS device | Vijay Narayanan, Terence B. Hook, Hemanth Jagannathan | 2022-07-19 |
| 11329136 | Enabling anneal for reliability improvement and multi-Vt with interfacial layer regrowth suppression | Huiming Bu | 2022-05-10 |
| 11289573 | Contact resistance reduction in nanosheet device structure | Heng Wu, Dechao Guo, Junli Wang, Lan Yu, Reinaldo Vega +1 more | 2022-03-29 |
| 11282838 | Stacked gate structures | Chen Zhang, Dechao Guo, Junli Wang, Ruilong Xie, Kangguo Cheng +5 more | 2022-03-22 |
| 11282962 | Threshold voltage adjustment from oxygen vacancy by scavenge metal filling at gate cut (CT) | Huimei Zhou, Michael P. Belyansky, Andrew M. Greene, Gen Tsutsui | 2022-03-22 |
| 11276767 | Additive core subtractive liner for metal cut etch processes | Kisup Chung, Andrew M. Greene, Sivananda K. Kanakasabapathy, David L. Rath, Indira Seshadri +1 more | 2022-03-15 |
| 11271106 | Replacement metal gate process for vertical transport field-effect transistor with self-aligned shared contacts | Brent A. Anderson, Choonghyun Lee, Hemanth Jagannathan | 2022-03-08 |
| 11257721 | Replacement metal gate process for vertical transport field-effect transistors with multiple threshold voltages | Hemanth Jagannathan, Brent A. Anderson, Choonghyun Lee | 2022-02-22 |
| 11251285 | Approach to control over-etching of bottom spacers in vertical fin field effect transistor devices | Hemanth Jagannathan, Paul C. Jamison, Choonghyun Lee | 2022-02-15 |
| 11245020 | Gate-all-around field effect transistor having multiple threshold voltages | Michael A. Guillorn, Terence B. Hook, Robert R. Robison, Reinaldo Vega, Tenko Yamashita | 2022-02-08 |