Issued Patents 2020
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10832973 | Stress modulation of nFET and pFET fin structures | Kangguo Cheng, Michael P. Belyansky, Oleg Gluschenkov, Richard A. Conti, James J. Kelly +1 more | 2020-11-10 |
| 10741673 | Controlling gate profile by inter-layer dielectric (ILD) nanolaminates | Michael P. Belyansky, Andrew M. Greene, Fee Li Lie | 2020-08-11 |
| 10685866 | Fin isolation to mitigate local layout effects | Gen Tsutsui, Andrew M. Greene, Dechao Guo, Huiming Bu, Robert R. Robison +2 more | 2020-06-16 |
| 10679901 | Differing device characteristics on a single wafer by selective etch | Shogo Mochizuki, Gen Tsutsui, Ruqiang Bao | 2020-06-09 |
| 10672910 | Threshold voltage adjustment from oxygen vacancy by scavenge metal filling at gate cut (CT) | Ruqiang Bao, Michael P. Belyansky, Andrew M. Greene, Gen Tsutsui | 2020-06-02 |
| 10665512 | Stress modulation of nFET and pFET fin structures | Kangguo Cheng, Michael P. Belyansky, Oleg Gluschenkov, Richard A. Conti, James J. Kelly +1 more | 2020-05-26 |
| 10664966 | Anomaly detection using image-based physical characterization | Dechao Guo, Liying Jiang, Derrick Liu, Jingyun Zhang | 2020-05-26 |
| 10658224 | Method of fin oxidation by flowable oxide fill and steam anneal to mitigate local layout effects | Gen Tsutsui, Veeraraghavan S. Basker, Andrew M. Greene, Dechao Guo, Huiming Bu +1 more | 2020-05-19 |