Issued Patents 2019
Showing 126–137 of 137 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10170638 | Nanosheet substrate isolated source/drain epitaxy by dual bottom spacer | — | 2019-01-01 |
| 10170637 | Perfectly symmetric gate-all-around FET on suspended nanowire | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2019-01-01 |
| 10170620 | Substantially defect free relaxed heterogeneous semiconductor fins on bulk substrates | Veeraraghavan S. Basker, Oleg Gluschenkov, Shogo Mochizuki | 2019-01-01 |
| 10170619 | Vertical schottky contact FET | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2019-01-01 |
| 10170587 | Heterogeneous source drain region and extension region | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2019-01-01 |
| 10170577 | Vertical transport FETs having a gradient threshold voltage | Choonghyun Lee, Takashi Ando, Jingyun Zhang, Pouya Hashemi | 2019-01-01 |
| 10170575 | Vertical transistors with buried metal silicide bottom contact | Kangguo Cheng, Tak H. Ning | 2019-01-01 |
| 10170550 | Stressed nanowire stack for field effect transistor | Martin M. Frank, Pouya Hashemi, Ali Khakifirooz | 2019-01-01 |
| 10170537 | Capacitor structure compatible with nanowire CMOS | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2019-01-01 |
| 10170499 | FinFET device with abrupt junctions | Kangguo Cheng, Hong He, Ali Khakifirooz, Soon-Cheon Seo | 2019-01-01 |
| 10170469 | Vertical field-effect-transistors having multiple threshold voltages | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2019-01-01 |
| 10170465 | Co-fabrication of vertical diodes and fin field effect transistors on the same substrate | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2019-01-01 |